fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2025-12-20 13:50:11 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions 2

tu: remove magic bo reg packing (use iovas directly)

Browse source 
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38762>
This commit is contained in:
Jonathan Marek 2020-09-17 11:31:33 -04:00 • committed by Marge Bot
parent 67c6abb20b
commit 2d6c15ad57
3 changed files with 13 additions and 24 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

8
src/freedreno/registers/gen_header.py
View file

@ -220,11 +220,15 @@ class Bitset(object):
address = self.get_address_field()
if address:
print("#ifndef TU_CS_H")
print(" .bo = fields.bo,")
print(" .is_address = true,")
print(" .bo_offset = fields.bo_offset,")
print(" .bo_shift = %d," % address.shr)
print(" .bo_low = %d," % address.low)
print("#else")
print(" .is_address = true,")
print("#endif")
print(" };")
@ -239,8 +243,10 @@ class Bitset(object):
print("struct %s {" % prefix)
for f in self.fields:
if f.type in ["address", "waddress"]:
print("#ifndef TU_CS_H")
tab_to(" __bo_type", "bo;")
tab_to(" uint32_t", "bo_offset;")
print("#endif\n")
continue
name = field_name(reg, f)
@ -881,8 +887,10 @@ class Parser(object):
if address:
continue
address = f
print("#ifndef TU_CS_H")
tab_to(" __bo_type", "bo;")
tab_to(" uint32_t", "bo_offset;")
print("#endif")
continue
type, val = f.ctype("var")
tab_to(" %s" % type, "%s;" % name)

8
src/freedreno/vulkan/tu_cmd_buffer.cc
View file

@ -2107,12 +2107,8 @@ tu6_init_static_regs(struct tu_device *dev, struct tu_cs *cs)
tu_cs_emit_regs(cs, A6XX_RB_ALPHA_TEST_CNTL()); /* always disable alpha test */
tu_cs_emit_regs(cs,
A6XX_TPL1_GFX_BORDER_COLOR_BASE(.bo = dev->global_bo,
.bo_offset = gb_offset(bcolor)));
tu_cs_emit_regs(cs,
A6XX_TPL1_CS_BORDER_COLOR_BASE(.bo = dev->global_bo,
.bo_offset = gb_offset(bcolor)));
tu_cs_emit_regs(cs, A6XX_TPL1_GFX_BORDER_COLOR_BASE(.qword = dev->global_bo->iova + gb_offset(bcolor)));
tu_cs_emit_regs(cs, A6XX_TPL1_CS_BORDER_COLOR_BASE(.qword = dev->global_bo->iova + gb_offset(bcolor)));
/* BR-only registers */
if (CHIP >= A7XX)

21
src/freedreno/vulkan/tu_cs.h
View file

@ -590,15 +590,10 @@ tu_cs_emit_data_nop(struct tu_cs *cs,
struct tu_reg_value {
uint32_t reg;
uint64_t value;
struct tu_bo *bo;
bool is_address;
uint32_t bo_offset;
uint32_t bo_shift;
uint32_t bo_low;
};
#define fd_reg_pair tu_reg_value
#define __bo_type struct tu_bo *
#include "a6xx-pack.xml.h"
#include "adreno-pm4-pack.xml.h"
@ -615,19 +610,9 @@ struct tu_reg_value {
do { \
if (i < ARRAY_SIZE(regs) && regs[i].reg > 0) { \
__assert_eq(regs[0].reg + i, regs[i].reg); \
if (regs[i].bo) { \
uint64_t v = regs[i].bo->iova + regs[i].bo_offset; \
v >>= regs[i].bo_shift; \
v <<= regs[i].bo_low; \
v |= regs[i].value; \
\
*p++ = v; \
*p++ = v >> 32; \
} else { \
*p++ = regs[i].value; \
if (regs[i].is_address) \
*p++ = regs[i].value >> 32; \
} \
*p++ = regs[i].value; \
if (regs[i].is_address) \
*p++ = regs[i].value >> 32; \
} \
} while (0)