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tu: remove magic bo reg packing (use iovas directly)
Signed-off-by: Jonathan Marek <jonathan@marek.ca> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38762>
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67c6abb20b
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2d6c15ad57
3 changed files with 13 additions and 24 deletions
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@ -220,11 +220,15 @@ class Bitset(object):
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address = self.get_address_field()
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address = self.get_address_field()
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if address:
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if address:
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print("#ifndef TU_CS_H")
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print(" .bo = fields.bo,")
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print(" .bo = fields.bo,")
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print(" .is_address = true,")
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print(" .is_address = true,")
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print(" .bo_offset = fields.bo_offset,")
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print(" .bo_offset = fields.bo_offset,")
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print(" .bo_shift = %d," % address.shr)
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print(" .bo_shift = %d," % address.shr)
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print(" .bo_low = %d," % address.low)
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print(" .bo_low = %d," % address.low)
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print("#else")
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print(" .is_address = true,")
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print("#endif")
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print(" };")
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print(" };")
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@ -239,8 +243,10 @@ class Bitset(object):
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print("struct %s {" % prefix)
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print("struct %s {" % prefix)
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for f in self.fields:
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for f in self.fields:
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if f.type in ["address", "waddress"]:
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if f.type in ["address", "waddress"]:
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print("#ifndef TU_CS_H")
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tab_to(" __bo_type", "bo;")
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tab_to(" __bo_type", "bo;")
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tab_to(" uint32_t", "bo_offset;")
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tab_to(" uint32_t", "bo_offset;")
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print("#endif\n")
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continue
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continue
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name = field_name(reg, f)
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name = field_name(reg, f)
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@ -881,8 +887,10 @@ class Parser(object):
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if address:
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if address:
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continue
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continue
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address = f
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address = f
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print("#ifndef TU_CS_H")
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tab_to(" __bo_type", "bo;")
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tab_to(" __bo_type", "bo;")
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tab_to(" uint32_t", "bo_offset;")
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tab_to(" uint32_t", "bo_offset;")
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print("#endif")
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continue
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continue
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type, val = f.ctype("var")
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type, val = f.ctype("var")
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tab_to(" %s" % type, "%s;" % name)
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tab_to(" %s" % type, "%s;" % name)
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@ -2107,12 +2107,8 @@ tu6_init_static_regs(struct tu_device *dev, struct tu_cs *cs)
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tu_cs_emit_regs(cs, A6XX_RB_ALPHA_TEST_CNTL()); /* always disable alpha test */
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tu_cs_emit_regs(cs, A6XX_RB_ALPHA_TEST_CNTL()); /* always disable alpha test */
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tu_cs_emit_regs(cs,
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tu_cs_emit_regs(cs, A6XX_TPL1_GFX_BORDER_COLOR_BASE(.qword = dev->global_bo->iova + gb_offset(bcolor)));
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A6XX_TPL1_GFX_BORDER_COLOR_BASE(.bo = dev->global_bo,
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tu_cs_emit_regs(cs, A6XX_TPL1_CS_BORDER_COLOR_BASE(.qword = dev->global_bo->iova + gb_offset(bcolor)));
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.bo_offset = gb_offset(bcolor)));
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tu_cs_emit_regs(cs,
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A6XX_TPL1_CS_BORDER_COLOR_BASE(.bo = dev->global_bo,
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.bo_offset = gb_offset(bcolor)));
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/* BR-only registers */
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/* BR-only registers */
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if (CHIP >= A7XX)
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if (CHIP >= A7XX)
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@ -590,15 +590,10 @@ tu_cs_emit_data_nop(struct tu_cs *cs,
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struct tu_reg_value {
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struct tu_reg_value {
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uint32_t reg;
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uint32_t reg;
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uint64_t value;
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uint64_t value;
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struct tu_bo *bo;
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bool is_address;
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bool is_address;
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uint32_t bo_offset;
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uint32_t bo_shift;
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uint32_t bo_low;
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};
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};
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#define fd_reg_pair tu_reg_value
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#define fd_reg_pair tu_reg_value
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#define __bo_type struct tu_bo *
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#include "a6xx-pack.xml.h"
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#include "a6xx-pack.xml.h"
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#include "adreno-pm4-pack.xml.h"
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#include "adreno-pm4-pack.xml.h"
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@ -615,19 +610,9 @@ struct tu_reg_value {
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do { \
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do { \
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if (i < ARRAY_SIZE(regs) && regs[i].reg > 0) { \
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if (i < ARRAY_SIZE(regs) && regs[i].reg > 0) { \
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__assert_eq(regs[0].reg + i, regs[i].reg); \
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__assert_eq(regs[0].reg + i, regs[i].reg); \
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if (regs[i].bo) { \
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*p++ = regs[i].value; \
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uint64_t v = regs[i].bo->iova + regs[i].bo_offset; \
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if (regs[i].is_address) \
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v >>= regs[i].bo_shift; \
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*p++ = regs[i].value >> 32; \
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v <<= regs[i].bo_low; \
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v |= regs[i].value; \
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\
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*p++ = v; \
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*p++ = v >> 32; \
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} else { \
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*p++ = regs[i].value; \
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if (regs[i].is_address) \
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*p++ = regs[i].value >> 32; \
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} \
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} \
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} \
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} while (0)
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} while (0)
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