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radv: convert radv_input_assembly_info to vk_input_assembly_state
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18015>
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428be16ebb
commit
2d488071c3
2 changed files with 8 additions and 28 deletions
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@ -1559,21 +1559,6 @@ radv_pipeline_init_vertex_input_info(struct radv_graphics_pipeline *pipeline,
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return info;
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}
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static struct radv_input_assembly_info
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radv_pipeline_init_input_assembly_info(struct radv_graphics_pipeline *pipeline,
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const VkGraphicsPipelineCreateInfo *pCreateInfo)
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{
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const VkPipelineInputAssemblyStateCreateInfo *ia = pCreateInfo->pInputAssemblyState;
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struct radv_input_assembly_info info = {0};
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info.primitive_topology = ia->topology;
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if (!(pipeline->dynamic_states & RADV_DYNAMIC_PRIMITIVE_RESTART_ENABLE))
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info.primitive_restart_enable = !!ia->primitiveRestartEnable;
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return info;
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}
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static struct radv_multisample_info
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radv_pipeline_init_multisample_info(struct radv_graphics_pipeline *pipeline,
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const VkGraphicsPipelineCreateInfo *pCreateInfo)
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@ -1703,7 +1688,6 @@ radv_pipeline_init_graphics_info(struct radv_graphics_pipeline *pipeline,
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/* Vertex input interface structs have to be ignored if the pipeline includes a mesh shader. */
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if (!(pipeline->active_stages & VK_SHADER_STAGE_MESH_BIT_NV)) {
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info.vi = radv_pipeline_init_vertex_input_info(pipeline, pCreateInfo);
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info.ia = radv_pipeline_init_input_assembly_info(pipeline, pCreateInfo);
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}
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info.ms = radv_pipeline_init_multisample_info(pipeline, pCreateInfo);
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@ -1793,7 +1777,7 @@ radv_pipeline_init_dynamic_state(struct radv_graphics_pipeline *pipeline,
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}
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if (states & RADV_DYNAMIC_PRIMITIVE_TOPOLOGY) {
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dynamic->primitive_topology = si_translate_prim(info->ia.primitive_topology);
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dynamic->primitive_topology = si_translate_prim(state->ia->primitive_topology);
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}
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/* If there is no depthstencil attachment, then don't read
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@ -1894,7 +1878,7 @@ radv_pipeline_init_dynamic_state(struct radv_graphics_pipeline *pipeline,
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}
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if (states & RADV_DYNAMIC_PRIMITIVE_RESTART_ENABLE) {
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dynamic->primitive_restart_enable = info->ia.primitive_restart_enable;
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dynamic->primitive_restart_enable = state->ia->primitive_restart_enable;
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}
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if (states & RADV_DYNAMIC_RASTERIZER_DISCARD_ENABLE) {
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@ -3103,7 +3087,9 @@ radv_generate_graphics_pipeline_key(const struct radv_graphics_pipeline *pipelin
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key.ps.alpha_to_coverage_via_mrtz = info->ms.alpha_to_coverage_enable;
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}
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key.vs.topology = si_translate_prim(info->ia.primitive_topology);
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if (state->ia) {
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key.vs.topology = si_translate_prim(state->ia->primitive_topology);
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}
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if (device->physical_device->rad_info.gfx_level >= GFX10) {
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key.vs.provoking_vtx_last =
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@ -6604,7 +6590,7 @@ radv_pipeline_init_shader_stages_state(struct radv_graphics_pipeline *pipeline)
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static uint32_t
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radv_pipeline_init_vgt_gs_out(struct radv_graphics_pipeline *pipeline,
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const struct radv_graphics_pipeline_info *info)
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const struct vk_graphics_pipeline_state *state)
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{
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uint32_t gs_out;
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@ -6622,7 +6608,7 @@ radv_pipeline_init_vgt_gs_out(struct radv_graphics_pipeline *pipeline,
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gs_out =
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si_conv_gl_prim_to_gs_out(pipeline->base.shaders[MESA_SHADER_MESH]->info.ms.output_prim);
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} else {
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gs_out = si_conv_prim_to_gs_out(si_translate_prim(info->ia.primitive_topology));
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gs_out = si_conv_prim_to_gs_out(si_translate_prim(state->ia->primitive_topology));
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}
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return gs_out;
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@ -6735,7 +6721,7 @@ radv_graphics_pipeline_init(struct radv_graphics_pipeline *pipeline, struct radv
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pipeline->spi_baryc_cntl = S_0286E0_FRONT_FACE_ALL_BITS(1);
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uint32_t vgt_gs_out_prim_type = radv_pipeline_init_vgt_gs_out(pipeline, &info);
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uint32_t vgt_gs_out_prim_type = radv_pipeline_init_vgt_gs_out(pipeline, &state);
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radv_pipeline_init_multisample_state(pipeline, &blend, &info, &state, vgt_gs_out_prim_type);
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@ -1962,11 +1962,6 @@ struct radv_vertex_input_info {
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uint32_t attrib_index_offset[MAX_VERTEX_ATTRIBS];
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};
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struct radv_input_assembly_info {
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VkPrimitiveTopology primitive_topology;
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bool primitive_restart_enable;
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};
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struct radv_multisample_info {
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bool sample_shading_enable;
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bool alpha_to_coverage_enable;
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@ -2008,7 +2003,6 @@ struct radv_color_blend_info {
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struct radv_graphics_pipeline_info {
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struct radv_vertex_input_info vi;
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struct radv_input_assembly_info ia;
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struct radv_multisample_info ms;
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struct radv_rendering_info ri;
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