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radv/ac: realign SI workaround with radeonsi.

Browse source 
This ports: da7453666a
radeonsi: don't apply the Z export bug workaround to Hainan
to radv.

Just noticed in passing.

Fixes: f4e499ec7 (radv: add initial non-conformant radv vulkan driver)
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit a81e99f50a)
This commit is contained in:
Dave Airlie 2017-07-26 02:32:39 +01:00 • committed by Emil Velikov
parent 546282e8bc
commit 2ce4f0afd3
1 changed files with 3 additions and 2 deletions
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5
src/amd/common/ac_nir_to_llvm.c
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@ -5815,10 +5815,11 @@ si_export_mrt_z(struct nir_to_llvm_context *ctx,
args.enabled_channels |= 0x4;
}
/* SI (except OLAND) has a bug that it only looks
/* SI (except OLAND and HAINAN) has a bug that it only looks
* at the X writemask component. */
if (ctx->options->chip_class == SI &&
ctx->options->family != CHIP_OLAND)
ctx->options->family != CHIP_OLAND &&
ctx->options->family != CHIP_HAINAN)
args.enabled_channels |= 0x1;
ac_build_export(&ctx->ac, &args);