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aco: add VMEMtoScalarWriteHazard tests
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18270>
This commit is contained in:
Rhys Perry
Marge Bot
parent
4c327dcfbc
commit
2cdb3e4b6b
1 changed files with 142 additions and 0 deletions
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@ -31,6 +31,12 @@ void create_mubuf(unsigned offset)
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Operand(PhysReg(256), v1), Operand::zero(), offset, true);
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}
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void create_mubuf_store(PhysReg src=PhysReg(256))
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{
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bld.mubuf(aco_opcode::buffer_store_dword, Operand(PhysReg(0), s4),
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Operand(src, v1), Operand::zero(), Operand(src, v1), 0, true);
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}
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void create_mimg(bool nsa, unsigned addrs, unsigned instr_dwords)
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{
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aco_ptr<MIMG_instruction> mimg{create_instruction<MIMG_instruction>(
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@ -164,3 +170,139 @@ BEGIN_TEST(insert_nops.writelane_to_nsa_bug)
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finish_insert_nops_test();
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END_TEST
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BEGIN_TEST(insert_nops.vmem_to_scalar_write)
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if (!setup_cs(NULL, GFX10))
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return;
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/* WaR: VMEM load */
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//>> p_unit_test 0
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//! v1: %0:v[0] = buffer_load_dword %0:s[0-3], %0:v[0], 0 offen
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//! s_waitcnt_depctr vm_vsrc(0)
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//! s1: %0:s[0] = s_mov_b32 0
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bld.pseudo(aco_opcode::p_unit_test, Operand::c32(0));
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create_mubuf(0);
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bld.sop1(aco_opcode::s_mov_b32, Definition(PhysReg(0), s1), Operand::zero());
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//! p_unit_test 1
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//! v1: %0:v[0] = buffer_load_dword %0:s[0-3], %0:v[0], 0 offen
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//! s_waitcnt_depctr vm_vsrc(0)
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//! s2: %0:exec = s_mov_b64 -1
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bld.pseudo(aco_opcode::p_unit_test, Operand::c32(1));
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create_mubuf(0);
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bld.sop1(aco_opcode::s_mov_b64, Definition(exec, s2), Operand::c64(-1));
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/* no hazard: VMEM load */
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//! p_unit_test 2
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//! v1: %0:v[0] = buffer_load_dword %0:s[0-3], %0:v[0], 0 offen
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//! s1: %0:s[4] = s_mov_b32 0
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bld.pseudo(aco_opcode::p_unit_test, Operand::c32(2));
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create_mubuf(0);
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bld.sop1(aco_opcode::s_mov_b32, Definition(PhysReg(4), s1), Operand::zero());
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/* no hazard: VMEM load with VALU in-between */
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//! p_unit_test 3
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//! v1: %0:v[0] = buffer_load_dword %0:s[0-3], %0:v[0], 0 offen
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//! v_nop
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//! s1: %0:s[0] = s_mov_b32 0
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bld.pseudo(aco_opcode::p_unit_test, Operand::c32(3));
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create_mubuf(0);
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bld.vop1(aco_opcode::v_nop);
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bld.sop1(aco_opcode::s_mov_b32, Definition(PhysReg(0), s1), Operand::zero());
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/* WaR: LDS */
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//! p_unit_test 4
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//! v1: %0:v[0] = ds_read_b32 %0:v[0], %0:m0
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//! s_waitcnt_depctr vm_vsrc(0)
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//! s1: %0:m0 = s_mov_b32 0
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bld.pseudo(aco_opcode::p_unit_test, Operand::c32(4));
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bld.ds(aco_opcode::ds_read_b32, Definition(PhysReg(256), v1), Operand(PhysReg(256), v1), Operand(m0, s1));
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bld.sop1(aco_opcode::s_mov_b32, Definition(m0, s1), Operand::zero());
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//! p_unit_test 5
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//! v1: %0:v[0] = ds_read_b32 %0:v[0], %0:m0
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//! s_waitcnt_depctr vm_vsrc(0)
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//! s2: %0:exec = s_mov_b64 -1
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bld.pseudo(aco_opcode::p_unit_test, Operand::c32(5));
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bld.ds(aco_opcode::ds_read_b32, Definition(PhysReg(256), v1), Operand(PhysReg(256), v1), Operand(m0, s1));
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bld.sop1(aco_opcode::s_mov_b64, Definition(exec, s2), Operand::c64(-1));
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/* no hazard: LDS */
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//! p_unit_test 6
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//! v1: %0:v[0] = ds_read_b32 %0:v[0], %0:m0
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//! s1: %0:s[0] = s_mov_b32 0
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bld.pseudo(aco_opcode::p_unit_test, Operand::c32(6));
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bld.ds(aco_opcode::ds_read_b32, Definition(PhysReg(256), v1), Operand(PhysReg(256), v1), Operand(m0, s1));
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bld.sop1(aco_opcode::s_mov_b32, Definition(PhysReg(0), s1), Operand::zero());
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/* no hazard: LDS with VALU in-between */
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//! p_unit_test 7
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//! v1: %0:v[0] = ds_read_b32 %0:v[0], %0:m0
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//! v_nop
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//! s1: %0:m0 = s_mov_b32 0
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bld.pseudo(aco_opcode::p_unit_test, Operand::c32(7));
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bld.ds(aco_opcode::ds_read_b32, Definition(PhysReg(256), v1), Operand(PhysReg(256), v1), Operand(m0, s1));
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bld.vop1(aco_opcode::v_nop);
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bld.sop1(aco_opcode::s_mov_b32, Definition(m0, s1), Operand::zero());
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/* no hazard: VMEM/LDS with the correct waitcnt in-between */
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//! p_unit_test 8
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//! v1: %0:v[0] = buffer_load_dword %0:s[0-3], %0:v[0], 0 offen
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//! s_waitcnt vmcnt(0)
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//! s1: %0:s[0] = s_mov_b32 0
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bld.pseudo(aco_opcode::p_unit_test, Operand::c32(8));
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create_mubuf(0);
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bld.sopp(aco_opcode::s_waitcnt, -1, 0x3f70);
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bld.sop1(aco_opcode::s_mov_b32, Definition(PhysReg(0), s1), Operand::zero());
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//! p_unit_test 9
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//! buffer_store_dword %0:s[0-3], %0:v[0], 0, %0:v[0] offen
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//! s1: %0:null = s_waitcnt_vscnt imm:0
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//! s1: %0:s[0] = s_mov_b32 0
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bld.pseudo(aco_opcode::p_unit_test, Operand::c32(9));
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create_mubuf_store();
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bld.sopk(aco_opcode::s_waitcnt_vscnt, Definition(sgpr_null, s1), 0);
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bld.sop1(aco_opcode::s_mov_b32, Definition(PhysReg(0), s1), Operand::zero());
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//! p_unit_test 10
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//! v1: %0:v[0] = ds_read_b32 %0:v[0], %0:m0
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//! s_waitcnt lgkmcnt(0)
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//! s1: %0:m0 = s_mov_b32 0
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bld.pseudo(aco_opcode::p_unit_test, Operand::c32(10));
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bld.ds(aco_opcode::ds_read_b32, Definition(PhysReg(256), v1), Operand(PhysReg(256), v1), Operand(m0, s1));
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bld.sopp(aco_opcode::s_waitcnt, -1, 0xc07f);
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bld.sop1(aco_opcode::s_mov_b32, Definition(m0, s1), Operand::zero());
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/* VMEM/LDS with the wrong waitcnt in-between */
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//! p_unit_test 11
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//! v1: %0:v[0] = buffer_load_dword %0:s[0-3], %0:v[0], 0 offen
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//! s1: %0:null = s_waitcnt_vscnt imm:0
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//! s_waitcnt_depctr vm_vsrc(0)
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//! s1: %0:s[0] = s_mov_b32 0
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bld.pseudo(aco_opcode::p_unit_test, Operand::c32(11));
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create_mubuf(0);
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bld.sopk(aco_opcode::s_waitcnt_vscnt, Definition(sgpr_null, s1), 0);
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bld.sop1(aco_opcode::s_mov_b32, Definition(PhysReg(0), s1), Operand::zero());
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//! p_unit_test 12
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//! buffer_store_dword %0:s[0-3], %0:v[0], 0, %0:v[0] offen
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//! s_waitcnt lgkmcnt(0)
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//! s_waitcnt_depctr vm_vsrc(0)
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//! s1: %0:s[0] = s_mov_b32 0
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bld.pseudo(aco_opcode::p_unit_test, Operand::c32(12));
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create_mubuf_store();
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bld.sopp(aco_opcode::s_waitcnt, -1, 0xc07f);
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bld.sop1(aco_opcode::s_mov_b32, Definition(PhysReg(0), s1), Operand::zero());
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//! p_unit_test 13
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//! v1: %0:v[0] = ds_read_b32 %0:v[0], %0:m0
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//! s_waitcnt vmcnt(0)
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//! s_waitcnt_depctr vm_vsrc(0)
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//! s1: %0:m0 = s_mov_b32 0
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bld.pseudo(aco_opcode::p_unit_test, Operand::c32(13));
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bld.ds(aco_opcode::ds_read_b32, Definition(PhysReg(256), v1), Operand(PhysReg(256), v1), Operand(m0, s1));
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bld.sopp(aco_opcode::s_waitcnt, -1, 0x3f70);
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bld.sop1(aco_opcode::s_mov_b32, Definition(m0, s1), Operand::zero());
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finish_insert_nops_test();
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END_TEST
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