diff --git a/src/amd/ci/restricted-traces-amd.yml b/src/amd/ci/restricted-traces-amd.yml
index e6729ebccb6..a0d8d303f82 100644
--- a/src/amd/ci/restricted-traces-amd.yml
+++ b/src/amd/ci/restricted-traces-amd.yml
@@ -30,7 +30,7 @@ traces:
       checksum: 47c004fed88bed8d3d387295399f0810
   angle/libangle_restricted_traces_pubg_mobile_battle_royale.so:
     vk-radv-raven:
-      checksum: 5c2a0f8ab6d98a7cf9461d755f051c16
+      checksum: ae4e6353a18c3ea76067a8d3a8740a75
   angle/libangle_restricted_traces_temple_run_300.so:
     vk-radv-raven:
       checksum: 4fa6a73dad7d9dd747ba7cbf82aae42e
diff --git a/src/amd/compiler/aco_instruction_selection.cpp b/src/amd/compiler/aco_instruction_selection.cpp
index 36ce31d0bd9..9ebca41ad99 100644
--- a/src/amd/compiler/aco_instruction_selection.cpp
+++ b/src/amd/compiler/aco_instruction_selection.cpp
@@ -5736,11 +5736,6 @@ emit_load_frag_coord(isel_context* ctx, Temp dst, unsigned num_components)
       else
          vec->operands[i] = Operand(v1);
    }
-   if (G_0286CC_POS_W_FLOAT_ENA(ctx->program->config->spi_ps_input_ena)) {
-      assert(num_components == 4);
-      vec->operands[3] =
-         bld.vop1(aco_opcode::v_rcp_f32, bld.def(v1), get_arg(ctx, ctx->args->frag_pos[3]));
-   }
 
    for (Operand& op : vec->operands)
       op = op.isUndefined() ? Operand::zero() : op;
diff --git a/src/amd/llvm/ac_nir_to_llvm.c b/src/amd/llvm/ac_nir_to_llvm.c
index f83ca8a86a9..9692a08d4e7 100644
--- a/src/amd/llvm/ac_nir_to_llvm.c
+++ b/src/amd/llvm/ac_nir_to_llvm.c
@@ -2873,8 +2873,7 @@ emit_load_frag_coord(struct ac_nir_context *ctx)
 {
    LLVMValueRef values[4] = {
       ac_get_arg(&ctx->ac, ctx->args->frag_pos[0]), ac_get_arg(&ctx->ac, ctx->args->frag_pos[1]),
-      ac_get_arg(&ctx->ac, ctx->args->frag_pos[2]),
-      ac_build_fdiv(&ctx->ac, ctx->ac.f32_1, ac_get_arg(&ctx->ac, ctx->args->frag_pos[3]))};
+      ac_get_arg(&ctx->ac, ctx->args->frag_pos[2]), ac_get_arg(&ctx->ac, ctx->args->frag_pos[3])};
 
    return ac_to_integer(&ctx->ac, ac_build_gather_values(&ctx->ac, values, 4));
 }
diff --git a/src/amd/vulkan/radv_pipeline_graphics.c b/src/amd/vulkan/radv_pipeline_graphics.c
index e2abd13e698..70529c9d600 100644
--- a/src/amd/vulkan/radv_pipeline_graphics.c
+++ b/src/amd/vulkan/radv_pipeline_graphics.c
@@ -2667,6 +2667,8 @@ radv_graphics_shaders_compile(struct radv_device *device, struct vk_pipeline_cac
 
       NIR_PASS(_, stages[MESA_SHADER_FRAGMENT].nir, radv_nir_lower_fs_barycentric, gfx_state, rast_prim);
 
+      NIR_PASS(_, stages[MESA_SHADER_FRAGMENT].nir, nir_lower_fragcoord_wtrans);
+
       /* frag_depth = gl_FragCoord.z broadcasts to all samples of the fragment shader invocation,
        * so only optimize it away if we know there is only one sample per invocation.
        * Because we don't know if sample shading is used with factor 1.0f, this means
diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index 6619ab9b750..3fd1a3b9f9a 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -2350,6 +2350,8 @@ struct nir_shader *si_get_nir_shader(struct si_shader *shader,
 
       if (key->ps.mono.point_smoothing)
          NIR_PASS(progress, nir, nir_lower_point_smooth);
+
+      NIR_PASS(progress, nir, nir_lower_fragcoord_wtrans);
    }
 
    /* This must be before si_nir_lower_resource. */