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Correct the convert to and from float instructions

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This commit is contained in:
Ian Romanick 2008-02-14 18:29:51 -08:00
parent c179bc9901
commit 2cc0c3b997
2 changed files with 42 additions and 4 deletions
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34
src/mesa/ppc/rtasm/spe_asm.c
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@ -87,6 +87,20 @@ union spe_inst_RI7 {
};
/**
* Encode one output register with one input reg. and an 8-bit signed immed
*/
union spe_inst_RI8 {
uint32_t bits;
struct {
unsigned op:10;
unsigned i8:8;
unsigned rA:7;
unsigned rT:7;
} inst;
};
/**
* Encode one output register with one input reg. and a 10-bit signed immed
*/
@ -169,6 +183,20 @@ static void emit_RI7(struct spe_function *p, unsigned op, unsigned rT,
static void emit_RI8(struct spe_function *p, unsigned op, unsigned rT,
unsigned rA, int imm)
{
union spe_inst_RI8 inst;
inst.inst.op = op;
inst.inst.i8 = imm;
inst.inst.rA = rA;
inst.inst.rT = rT;
*p->csr = inst.bits;
p->csr++;
}
static void emit_RI10(struct spe_function *p, unsigned op, unsigned rT,
unsigned rA, int imm)
{
@ -238,6 +266,12 @@ void _name (struct spe_function *p, unsigned rT, unsigned rA, int imm) \
emit_RI7(p, _op, rT, rA, imm); \
}
#define EMIT_RI8(_name, _op) \
void _name (struct spe_function *p, unsigned rT, unsigned rA, int imm) \
{ \
emit_RI8(p, _op, rT, rA, 155 - imm); \
}
#define EMIT_RI10(_name, _op) \
void _name (struct spe_function *p, unsigned rT, unsigned rA, int imm) \
{ \

12
src/mesa/ppc/rtasm/spe_asm.h
View file

@ -60,6 +60,9 @@ extern void spe_release_func(struct spe_function *p);
#define EMIT_RI7(_name, _op) \
extern void _name (struct spe_function *p, unsigned rT, unsigned rA, \
int imm)
#define EMIT_RI8(_name, _op) \
extern void _name (struct spe_function *p, unsigned rT, unsigned rA, \
int imm)
#define EMIT_RI10(_name, _op) \
extern void _name (struct spe_function *p, unsigned rT, unsigned rA, \
int imm)
@ -270,10 +273,10 @@ EMIT_RR (spe_dfnma, 0x35f);
EMIT_R (spe_frest, 0x1b8);
EMIT_R (spe_frsqest, 0x1b9);
EMIT_RR (spe_fi, 0x3d4);
EMIT_RI7 (spe_csflt, 0x3da);
EMIT_RI7 (spe_cflts, 0x3d8);
EMIT_RI7 (spe_cuflt, 0x3db);
EMIT_RI7 (spe_cfltu, 0x3d9);
EMIT_RI8 (spe_csflt, 0x1da);
EMIT_RI8 (spe_cflts, 0x1d8);
EMIT_RI8 (spe_cuflt, 0x1db);
EMIT_RI8 (spe_cfltu, 0x1d9);
EMIT_R (spe_frds, 0x3b9);
EMIT_R (spe_fesd, 0x3b8);
EMIT_RR (spe_dfceq, 0x3c3);
@ -302,6 +305,7 @@ EMIT_R (spe_wrch, 0x10d);
#undef EMIT_RR
#undef EMIT_RRR
#undef EMIT_RI7
#undef EMIT_RI8
#undef EMIT_RI10
#undef EMIT_RI16
#undef EMIT_RI18