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anv/cmd_buffer: Move the mi_alu helper higher up

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Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
This commit is contained in:
Jason Ekstrand 2018-01-18 16:08:31 -08:00
parent 2e69045c4d
commit 2cbfcb205e
1 changed files with 19 additions and 17 deletions
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36
src/intel/vulkan/genX_cmd_buffer.c
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@ -431,6 +431,25 @@ genX(set_image_needs_resolve)(struct anv_cmd_buffer *cmd_buffer,
}
}
#if GEN_IS_HASWELL || GEN_GEN >= 8
static inline uint32_t
mi_alu(uint32_t opcode, uint32_t operand1, uint32_t operand2)
{
struct GENX(MI_MATH_ALU_INSTRUCTION) instr = {
.ALUOpcode = opcode,
.Operand1 = operand1,
.Operand2 = operand2,
};
uint32_t dw;
GENX(MI_MATH_ALU_INSTRUCTION_pack)(NULL, &dw, &instr);
return dw;
}
#endif
#define CS_GPR(n) (0x2600 + (n) * 8)
static void
genX(load_needs_resolve_predicate)(struct anv_cmd_buffer *cmd_buffer,
const struct anv_image *image,
@ -2382,23 +2401,6 @@ void genX(CmdDrawIndexed)(
/* MI_MATH only exists on Haswell+ */
#if GEN_IS_HASWELL || GEN_GEN >= 8
static uint32_t
mi_alu(uint32_t opcode, uint32_t op1, uint32_t op2)
{
struct GENX(MI_MATH_ALU_INSTRUCTION) instr = {
.ALUOpcode = opcode,
.Operand1 = op1,
.Operand2 = op2,
};
uint32_t dw;
GENX(MI_MATH_ALU_INSTRUCTION_pack)(NULL, &dw, &instr);
return dw;
}
#define CS_GPR(n) (0x2600 + (n) * 8)
/* Emit dwords to multiply GPR0 by N */
static void
build_alu_multiply_gpr0(uint32_t *dw, unsigned *dw_count, uint32_t N)