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radeonsi: determine DB_SHADER_CONTROL outside of shader compilation

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because the API pixel shader binary will not emulate alpha test one day,
so the KILL_ENABLE bit must be determined elsewhere.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
This commit is contained in:
Marek Olšák 2015-12-23 15:36:05 +01:00
parent ff7e77724e
commit 2cb8bf90cd
3 changed files with 40 additions and 28 deletions
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20
src/gallium/drivers/radeonsi/si_shader.c
View file

@ -1390,8 +1390,6 @@ static void si_alpha_test(struct lp_build_tgsi_context *bld_base,
LLVMVoidTypeInContext(gallivm->context),
NULL, 0, 0);
}
si_shader_ctx->shader->db_shader_control |= S_02880C_KILL_ENABLE(1);
}
static void si_scale_alpha_by_sample_mask(struct lp_build_tgsi_context *bld_base,
@ -2229,22 +2227,18 @@ static void si_llvm_emit_fs_epilogue(struct lp_build_tgsi_context * bld_base)
out_ptr = si_shader_ctx->radeon_bld.soa.outputs[depth_index][2];
args[5] = LLVMBuildLoad(base->gallivm->builder, out_ptr, "");
mask |= 0x1;
si_shader_ctx->shader->db_shader_control |= S_02880C_Z_EXPORT_ENABLE(1);
}
if (stencil_index >= 0) {
out_ptr = si_shader_ctx->radeon_bld.soa.outputs[stencil_index][1];
args[6] = LLVMBuildLoad(base->gallivm->builder, out_ptr, "");
mask |= 0x2;
si_shader_ctx->shader->db_shader_control |=
S_02880C_STENCIL_TEST_VAL_EXPORT_ENABLE(1);
}
if (samplemask_index >= 0) {
out_ptr = si_shader_ctx->radeon_bld.soa.outputs[samplemask_index][0];
args[7] = LLVMBuildLoad(base->gallivm->builder, out_ptr, "");
mask |= 0x4;
si_shader_ctx->shader->db_shader_control |= S_02880C_MASK_EXPORT_ENABLE(1);
}
/* SI (except OLAND) has a bug that it only looks
@ -4113,9 +4107,6 @@ int si_shader_create(struct si_screen *sscreen, LLVMTargetMachineRef tm,
if (sel->type != PIPE_SHADER_COMPUTE)
shader->dx10_clamp_mode = true;
if (sel->info.uses_kill)
shader->db_shader_control |= S_02880C_KILL_ENABLE(1);
shader->uses_instanceid = sel->info.uses_instanceid;
bld_base->info = poly_stipple ? &stipple_shader_info : &sel->info;
bld_base->emit_fetch_funcs[TGSI_FILE_CONSTANT] = fetch_constant;
@ -4190,17 +4181,6 @@ int si_shader_create(struct si_screen *sscreen, LLVMTargetMachineRef tm,
case TGSI_PROCESSOR_FRAGMENT:
si_shader_ctx.radeon_bld.load_input = declare_input_fs;
bld_base->emit_epilogue = si_llvm_emit_fs_epilogue;
switch (sel->info.properties[TGSI_PROPERTY_FS_DEPTH_LAYOUT]) {
case TGSI_FS_DEPTH_LAYOUT_GREATER:
shader->db_shader_control |=
S_02880C_CONSERVATIVE_Z_EXPORT(V_02880C_EXPORT_GREATER_THAN_Z);
break;
case TGSI_FS_DEPTH_LAYOUT_LESS:
shader->db_shader_control |=
S_02880C_CONSERVATIVE_Z_EXPORT(V_02880C_EXPORT_LESS_THAN_Z);
break;
}
break;
default:
assert(!"Unsupported shader type");

5
src/gallium/drivers/radeonsi/si_shader.h
View file

@ -201,6 +201,7 @@ struct si_shader_selector {
bool forces_persample_interp_for_persp;
bool forces_persample_interp_for_linear;
/* GS parameters. */
unsigned esgs_itemsize;
unsigned gs_input_verts_per_prim;
unsigned gs_output_prim;
@ -210,6 +211,9 @@ struct si_shader_selector {
unsigned gsvs_vertex_size;
unsigned max_gsvs_emit_size;
/* PS parameters. */
unsigned db_shader_control;
/* masks of "get_unique_index" bits */
uint64_t outputs_written;
uint32_t patch_outputs_written;
@ -275,7 +279,6 @@ struct si_shader {
unsigned scratch_bytes_per_wave;
unsigned spi_shader_col_format;
unsigned spi_shader_z_format;
unsigned db_shader_control;
unsigned cb_shader_mask;
union si_shader_key key;

43
src/gallium/drivers/radeonsi/si_state_shaders.c
View file

@ -496,6 +496,16 @@ static void si_shader_init_pm4_state(struct si_shader *shader)
}
}
static unsigned si_get_alpha_test_func(struct si_context *sctx)
{
/* Alpha-test should be disabled if colorbuffer 0 is integer. */
if (sctx->queued.named.dsa &&
!sctx->framebuffer.cb0_is_integer)
return sctx->queued.named.dsa->alpha_func;
return PIPE_FUNC_ALWAYS;
}
/* Compute the key for the hw shader variant */
static inline void si_shader_selector_key(struct pipe_context *ctx,
struct si_shader_selector *sel,
@ -562,11 +572,7 @@ static inline void si_shader_selector_key(struct pipe_context *ctx,
key->ps.clamp_color = rs->clamp_fragment_color;
}
key->ps.alpha_func = PIPE_FUNC_ALWAYS;
/* Alpha-test should be disabled if colorbuffer 0 is integer. */
if (sctx->queued.named.dsa &&
!sctx->framebuffer.cb0_is_integer)
key->ps.alpha_func = sctx->queued.named.dsa->alpha_func;
key->ps.alpha_func = si_get_alpha_test_func(sctx);
break;
}
default:
@ -731,6 +737,25 @@ static void *si_create_shader_selector(struct pipe_context *ctx,
break;
}
/* DB_SHADER_CONTROL */
sel->db_shader_control =
S_02880C_Z_EXPORT_ENABLE(sel->info.writes_z) |
S_02880C_STENCIL_TEST_VAL_EXPORT_ENABLE(sel->info.writes_stencil) |
S_02880C_MASK_EXPORT_ENABLE(sel->info.writes_samplemask) |
S_02880C_KILL_ENABLE(sel->info.uses_kill);
switch (sel->info.properties[TGSI_PROPERTY_FS_DEPTH_LAYOUT]) {
case TGSI_FS_DEPTH_LAYOUT_GREATER:
sel->db_shader_control |=
S_02880C_CONSERVATIVE_Z_EXPORT(V_02880C_EXPORT_GREATER_THAN_Z);
break;
case TGSI_FS_DEPTH_LAYOUT_LESS:
sel->db_shader_control |=
S_02880C_CONSERVATIVE_Z_EXPORT(V_02880C_EXPORT_LESS_THAN_Z);
break;
}
/* Pre-compilation. */
if (sscreen->b.debug_flags & DBG_PRECOMPILE) {
struct si_shader_ctx_state state = {sel};
@ -1549,6 +1574,10 @@ bool si_update_shaders(struct si_context *sctx)
si_update_vgt_shader_config(sctx);
if (sctx->ps_shader.cso) {
unsigned db_shader_control =
sctx->ps_shader.cso->db_shader_control |
S_02880C_KILL_ENABLE(si_get_alpha_test_func(sctx) != PIPE_FUNC_ALWAYS);
r = si_shader_select(ctx, &sctx->ps_shader);
if (r)
return false;
@ -1568,8 +1597,8 @@ bool si_update_shaders(struct si_context *sctx)
si_mark_atom_dirty(sctx, &sctx->spi_ps_input);
}
if (sctx->ps_db_shader_control != sctx->ps_shader.current->db_shader_control) {
sctx->ps_db_shader_control = sctx->ps_shader.current->db_shader_control;
if (sctx->ps_db_shader_control != db_shader_control) {
sctx->ps_db_shader_control = db_shader_control;
si_mark_atom_dirty(sctx, &sctx->db_render_state);
}