diff --git a/src/compiler/glsl/gl_nir_linker.c b/src/compiler/glsl/gl_nir_linker.c
index 0add54ffff4..ac5aec627b3 100644
--- a/src/compiler/glsl/gl_nir_linker.c
+++ b/src/compiler/glsl/gl_nir_linker.c
@@ -1508,7 +1508,7 @@ gl_nir_lower_optimize_varyings(const struct gl_constants *consts,
       nir_shader *nir = shader->Program->nir;
 
       if (nir->info.stage == MESA_SHADER_COMPUTE ||
-          !(nir->options->io_options & nir_io_glsl_lower_derefs))
+          !(nir->options->io_options & nir_io_has_intrinsics))
          return;
 
       shaders[num_shaders] = nir;
diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h
index 8e6332f669e..f1f520c1550 100644
--- a/src/compiler/nir/nir.h
+++ b/src/compiler/nir/nir.h
@@ -3834,13 +3834,13 @@ typedef enum {
     */
    nir_io_vectorizer_ignores_types = BITFIELD_BIT(6),
 
-   /* Options affecting the GLSL compiler are below. */
+   /* Options affecting the GLSL compiler or Gallium are below. */
 
    /**
     * Lower load_deref/store_deref to load_input/store_output/etc. intrinsics.
-    * This is only affects GLSL compilation.
+    * This is only affects GLSL compilation and Gallium.
     */
-   nir_io_glsl_lower_derefs = BITFIELD_BIT(16),
+   nir_io_has_intrinsics = BITFIELD_BIT(16),
 
    /**
     * Run nir_opt_varyings in the GLSL linker.
diff --git a/src/gallium/drivers/radeonsi/si_get.c b/src/gallium/drivers/radeonsi/si_get.c
index 2b7dda123a5..b23ad67684e 100644
--- a/src/gallium/drivers/radeonsi/si_get.c
+++ b/src/gallium/drivers/radeonsi/si_get.c
@@ -1570,8 +1570,7 @@ void si_init_screen_get_functions(struct si_screen *sscreen)
     * when execution mode is rtz instead of rtne.
     */
    options->force_f2f16_rtz = true;
-   options->io_options |= (!has_mediump ? nir_io_mediump_is_32bit : 0) |
-                          nir_io_glsl_lower_derefs |
+   options->io_options |= (!has_mediump ? nir_io_mediump_is_32bit : 0) | nir_io_has_intrinsics |
                           (sscreen->options.optimize_io ? nir_io_glsl_opt_varyings : 0);
    options->lower_mediump_io = has_mediump ? si_lower_mediump_io : NULL;
    /* HW supports indirect indexing for: | Enabled in driver
diff --git a/src/gallium/drivers/zink/zink_compiler.c b/src/gallium/drivers/zink/zink_compiler.c
index cb4b64e0e10..d962f4d26d8 100644
--- a/src/gallium/drivers/zink/zink_compiler.c
+++ b/src/gallium/drivers/zink/zink_compiler.c
@@ -1338,7 +1338,7 @@ zink_screen_init_compiler(struct zink_screen *screen)
 {
    static const struct nir_shader_compiler_options
    default_options = {
-      .io_options = nir_io_glsl_lower_derefs,
+      .io_options = nir_io_has_intrinsics,
       .lower_ffma16 = true,
       .lower_ffma32 = true,
       .lower_ffma64 = true,
diff --git a/src/mesa/main/glspirv.c b/src/mesa/main/glspirv.c
index 7ef949d7263..7f8c636af06 100644
--- a/src/mesa/main/glspirv.c
+++ b/src/mesa/main/glspirv.c
@@ -335,7 +335,7 @@ _mesa_spirv_to_nir(struct gl_context *ctx,
    NIR_PASS(_, nir, nir_split_per_member_structs);
 
    if (nir->info.stage == MESA_SHADER_VERTEX &&
-       !(nir->options->io_options & nir_io_glsl_lower_derefs))
+       !(nir->options->io_options & nir_io_has_intrinsics))
       nir_remap_dual_slot_attributes(nir, &linked_shader->Program->DualSlotInputs);
 
    NIR_PASS(_, nir, nir_lower_frexp);