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r600g: don't flush the gfx IB explicitly before doing DMA
It's flushed by calling r600_context_bo_reloc. Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
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4 changed files with 0 additions and 11 deletions
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@ -46,8 +46,6 @@ void evergreen_dma_copy(struct r600_context *rctx,
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util_range_add(&rdst->valid_buffer_range, dst_offset,
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dst_offset + size);
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/* make sure that the dma ring is only one active */
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rctx->b.rings.gfx.flush(rctx, RADEON_FLUSH_ASYNC);
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dst_offset += r600_resource_va(&rctx->screen->b.b, dst);
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src_offset += r600_resource_va(&rctx->screen->b.b, src);
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@ -3221,9 +3221,6 @@ static void evergreen_dma_copy_tile(struct r600_context *rctx,
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unsigned sub_cmd, bank_h, bank_w, mt_aspect, nbanks, tile_split, non_disp_tiling = 0;
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uint64_t base, addr;
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/* make sure that the dma ring is only one active */
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rctx->b.rings.gfx.flush(rctx, RADEON_FLUSH_ASYNC);
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dst_mode = rdst->surface.level[dst_level].mode;
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src_mode = rsrc->surface.level[src_level].mode;
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/* downcast linear aligned to linear to simplify test */
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@ -458,9 +458,6 @@ void r600_dma_copy(struct r600_context *rctx,
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util_range_add(&rdst->valid_buffer_range, dst_offset,
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dst_offset + size);
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/* make sure that the dma ring is only one active */
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rctx->b.rings.gfx.flush(rctx, RADEON_FLUSH_ASYNC);
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size >>= 2;
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shift = 2;
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ncopy = (size / 0xffff) + !!(size % 0xffff);
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@ -2793,9 +2793,6 @@ static boolean r600_dma_copy_tile(struct r600_context *rctx,
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unsigned ncopy, height, cheight, detile, i, x, y, z, src_mode, dst_mode;
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uint64_t base, addr;
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/* make sure that the dma ring is only one active */
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rctx->b.rings.gfx.flush(rctx, RADEON_FLUSH_ASYNC);
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dst_mode = rdst->surface.level[dst_level].mode;
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src_mode = rsrc->surface.level[src_level].mode;
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/* downcast linear aligned to linear to simplify test */
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