diff --git a/src/intel/compiler/brw_disasm.c b/src/intel/compiler/brw_disasm.c
index 982ae51bf17..63a7141c7a1 100644
--- a/src/intel/compiler/brw_disasm.c
+++ b/src/intel/compiler/brw_disasm.c
@@ -570,6 +570,13 @@ static const char *const lsc_operation[] = {
    [LSC_OP_ATOMIC_XOR]      = "atomic_xor",
 };
 
+const char *
+brw_lsc_op_to_string(unsigned op)
+{
+   assert(op < ARRAY_SIZE(lsc_operation));
+   return lsc_operation[op];
+}
+
 static const char *const lsc_addr_surface_type[] = {
    [LSC_ADDR_SURFTYPE_FLAT] = "flat",
    [LSC_ADDR_SURFTYPE_BSS]  = "bss",
@@ -577,6 +584,13 @@ static const char *const lsc_addr_surface_type[] = {
    [LSC_ADDR_SURFTYPE_BTI]  = "bti",
 };
 
+const char *
+brw_lsc_addr_surftype_to_string(unsigned t)
+{
+   assert(t < ARRAY_SIZE(lsc_addr_surface_type));
+   return lsc_addr_surface_type[t];
+}
+
 static const char* const lsc_fence_scope[] = {
    [LSC_FENCE_THREADGROUP]     = "threadgroup",
    [LSC_FENCE_LOCAL]           = "local",
@@ -618,6 +632,13 @@ static const char* const lsc_data_size[] = {
    [LSC_DATA_SIZE_D16BF32] = "d16bf32",
 };
 
+const char *
+brw_lsc_data_size_to_string(unsigned s)
+{
+   assert(s < ARRAY_SIZE(lsc_data_size));
+   return lsc_data_size[s];
+}
+
 static const char* const lsc_vect_size_str[] = {
    [LSC_VECT_SIZE_V1] = "V1",
    [LSC_VECT_SIZE_V2] = "V2",
diff --git a/src/intel/compiler/brw_disasm.h b/src/intel/compiler/brw_disasm.h
index 3ebfcfd3051..ff3697fbbed 100644
--- a/src/intel/compiler/brw_disasm.h
+++ b/src/intel/compiler/brw_disasm.h
@@ -35,6 +35,10 @@ int brw_disassemble_find_end(const struct brw_isa_info *isa,
 void brw_disassemble_with_errors(const struct brw_isa_info *isa,
                                  const void *assembly, int start, FILE *out);
 
+const char *brw_lsc_op_to_string(unsigned op);
+const char *brw_lsc_addr_surftype_to_string(unsigned t);
+const char *brw_lsc_data_size_to_string(unsigned s);
+
 #ifdef __cplusplus
 } /* extern "C" */
 #endif