From 2c462fe9ccc46bd38f3310f8df3f0b603b6f349f Mon Sep 17 00:00:00 2001 From: Connor Abbott Date: Thu, 4 Jul 2024 15:54:56 -0400 Subject: [PATCH] ir3: Fix stg/ldg immediate offset on a7xx Don't multiply by 4 twice. While we're here, fix the in-bounds check on a6xx, since we need to account for the multiplying by 4. This was done correctly on a7xx but the commit below didn't correctly port it to a6xx when adding the multiply on a6xx. Fixes: 01bac643f6c ("freedreno/ir3: Fix ldg/stg offset") Part-of: --- src/freedreno/ir3/ir3_a6xx.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/freedreno/ir3/ir3_a6xx.c b/src/freedreno/ir3/ir3_a6xx.c index 4be8f26cfd7..adafe21170b 100644 --- a/src/freedreno/ir3/ir3_a6xx.c +++ b/src/freedreno/ir3/ir3_a6xx.c @@ -418,17 +418,17 @@ emit_intrinsic_load_global_ir3(struct ir3_context *ctx, struct ir3_instruction *load; - unsigned shift = ctx->compiler->gen >= 7 ? 2 : 0; bool const_offset_in_bounds = nir_src_is_const(intr->src[1]) && - nir_src_as_int(intr->src[1]) < ((1 << 10) >> shift) && - nir_src_as_int(intr->src[1]) > -((1 << 10) >> shift); + nir_src_as_int(intr->src[1]) < (1 << 8) && + nir_src_as_int(intr->src[1]) > -(1 << 8); if (const_offset_in_bounds) { load = ir3_LDG(b, addr, 0, - create_immed(b, (nir_src_as_int(intr->src[1]) * 4) << shift), + create_immed(b, nir_src_as_int(intr->src[1]) * 4), 0, create_immed(b, dest_components), 0); } else { + unsigned shift = ctx->compiler->gen >= 7 ? 2 : 0; offset = ir3_get_src(ctx, &intr->src[1])[0]; if (shift) { /* A7XX TODO: Move to NIR for it to be properly optimized? */