From 2c1a7f877cc55471a06660ab07273a589f8bafd7 Mon Sep 17 00:00:00 2001 From: Ryan Neph Date: Mon, 22 Aug 2022 16:32:14 -0700 Subject: [PATCH] venus: place wsi submissions on corresponding ring_idx With implicit fencing, the image has a fence that blocks scanout until rendering is complete. virtgpu doesn't support implicit fencing yet, but Sommelier (a VM Wayland compositor) does the wait by exposing the bo as a GEM handle and waiting on all fences in userspace with a DRM_IOCTL_VIRTGPU_WAIT before issuing the wl_surface commit. During vkQueueSubmit involving wsi images, we follow with an empty renderer submission on the corresonding ring_idx to install a fence on the appropriate virtgpu fence context after the last rendering submission. Signed-off-by: Ryan Neph Part-of: --- src/virtio/vulkan/vn_queue.c | 28 ++++++++++++++++++++-------- 1 file changed, 20 insertions(+), 8 deletions(-) diff --git a/src/virtio/vulkan/vn_queue.c b/src/virtio/vulkan/vn_queue.c index fd8574f6c32..63ce1eb3211 100644 --- a/src/virtio/vulkan/vn_queue.c +++ b/src/virtio/vulkan/vn_queue.c @@ -511,10 +511,16 @@ vn_QueueSubmit(VkQueue queue_h, if (submit.wsi_mem) { /* XXX this is always false and kills the performance */ if (dev->instance->renderer->info.has_implicit_fencing) { - vn_renderer_submit(dev->renderer, &(const struct vn_renderer_submit){ - .bos = &submit.wsi_mem->base_bo, - .bo_count = 1, - }); + vn_renderer_submit(dev->renderer, + &(const struct vn_renderer_submit){ + .bos = &submit.wsi_mem->base_bo, + .bo_count = 1, + .batches = + &(struct vn_renderer_submit_batch){ + .ring_idx = queue->ring_idx, + }, + .batch_count = 1, + }); } else { vn_queue_wait_idle_before_present(queue); } @@ -683,10 +689,16 @@ vn_QueueSubmit2(VkQueue queue_h, vn_device_memory_from_handle(wsi_info->memory); assert(!wsi_mem->base_memory && wsi_mem->base_bo); - vn_renderer_submit(dev->renderer, &(const struct vn_renderer_submit){ - .bos = &wsi_mem->base_bo, - .bo_count = 1, - }); + vn_renderer_submit(dev->renderer, + &(const struct vn_renderer_submit){ + .bos = &wsi_mem->base_bo, + .bo_count = 1, + .batches = + &(struct vn_renderer_submit_batch){ + .ring_idx = queue->ring_idx, + }, + .batch_count = 1, + }); } else { vn_queue_wait_idle_before_present(queue); }