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ac/nir: split scanning outputs from setting up output allocas
The scanning phase sets the driver_location, because it is part of the ABI: radeonsi does the assignment differently. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
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1a508cf8d6
commit
2be774b196
1 changed files with 45 additions and 10 deletions
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@ -5007,12 +5007,13 @@ static LLVMValueRef si_build_alloca_undef(struct ac_llvm_context *ac,
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}
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static void
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handle_shader_output_decl(struct nir_to_llvm_context *ctx,
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struct nir_variable *variable)
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scan_shader_output_decl(struct nir_to_llvm_context *ctx,
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struct nir_variable *variable)
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{
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int idx = variable->data.location + variable->data.index;
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unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
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uint64_t mask_attribs;
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variable->data.driver_location = idx * 4;
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/* tess ctrl has it's own load/store paths for outputs */
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@ -5042,13 +5043,42 @@ handle_shader_output_decl(struct nir_to_llvm_context *ctx,
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}
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}
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for (unsigned i = 0; i < attrib_count; ++i) {
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for (unsigned chan = 0; chan < 4; chan++) {
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ctx->nir->outputs[radeon_llvm_reg_index_soa(idx + i, chan)] =
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si_build_alloca_undef(&ctx->ac, ctx->f32, "");
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ctx->output_mask |= mask_attribs;
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}
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static void
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handle_shader_output_decl(struct ac_nir_context *ctx,
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struct nir_shader *nir,
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struct nir_variable *variable)
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{
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unsigned output_loc = variable->data.driver_location / 4;
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unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
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/* tess ctrl has it's own load/store paths for outputs */
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if (ctx->stage == MESA_SHADER_TESS_CTRL)
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return;
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if (ctx->stage == MESA_SHADER_VERTEX ||
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ctx->stage == MESA_SHADER_TESS_EVAL ||
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ctx->stage == MESA_SHADER_GEOMETRY) {
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int idx = variable->data.location + variable->data.index;
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if (idx == VARYING_SLOT_CLIP_DIST0) {
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int length = nir->info.clip_distance_array_size +
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nir->info.cull_distance_array_size;
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if (length > 4)
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attrib_count = 2;
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else
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attrib_count = 1;
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}
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}
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for (unsigned i = 0; i < attrib_count; ++i) {
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for (unsigned chan = 0; chan < 4; chan++) {
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ctx->outputs[radeon_llvm_reg_index_soa(output_loc + i, chan)] =
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si_build_alloca_undef(&ctx->ac, ctx->ac.f32, "");
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}
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}
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ctx->output_mask |= mask_attribs;
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}
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static LLVMTypeRef
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@ -6073,7 +6103,7 @@ void ac_nir_translate(struct ac_llvm_context *ac, struct ac_shader_abi *abi,
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ctx.stage = nir->stage;
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nir_foreach_variable(variable, &nir->outputs)
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handle_shader_output_decl(nctx, variable);
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handle_shader_output_decl(&ctx, nir, variable);
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ctx.defs = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
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_mesa_key_pointer_equal);
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@ -6170,6 +6200,9 @@ LLVMModuleRef ac_translate_nir_to_llvm(LLVMTargetMachineRef tm,
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ctx.abi.inputs = &ctx.inputs[0];
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ctx.abi.emit_outputs = handle_shader_outputs_post;
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nir_foreach_variable(variable, &nir->outputs)
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scan_shader_output_decl(&ctx, variable);
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ac_nir_translate(&ctx.ac, &ctx.abi, nir, &ctx);
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LLVMBuildRetVoid(ctx.builder);
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@ -6457,8 +6490,10 @@ void ac_create_gs_copy_shader(LLVMTargetMachineRef tm,
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nir_ctx.nctx = &ctx;
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ctx.nir = &nir_ctx;
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nir_foreach_variable(variable, &geom_shader->outputs)
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handle_shader_output_decl(&ctx, variable);
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nir_foreach_variable(variable, &geom_shader->outputs) {
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scan_shader_output_decl(&ctx, variable);
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handle_shader_output_decl(&nir_ctx, geom_shader, variable);
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}
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ac_gs_copy_shader_emit(&ctx);
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