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anv: Skip the RT flush when doing depth-only rendering.

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The spec citation says it's just for when the RT write message BTI might
point to a different RT, and if we don't have any color attachments then
we won't have one of those at all.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21508>
This commit is contained in:
Emma Anholt 2023-02-21 09:43:46 -08:00 • committed by Marge Bot
parent 6992aa951d
commit 2bd304bc8f
1 changed files with 23 additions and 12 deletions
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35
src/intel/vulkan/genX_cmd_buffer.c
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@ -7488,18 +7488,29 @@ void genX(CmdBeginRendering)(
gfx->dirty |= ANV_CMD_DIRTY_PIPELINE;
#if GFX_VER >= 11
/* The PIPE_CONTROL command description says:
*
* "Whenever a Binding Table Index (BTI) used by a Render Target Message
* points to a different RENDER_SURFACE_STATE, SW must issue a Render
* Target Cache Flush by enabling this bit. When render target flush
* is set due to new association of BTI, PS Scoreboard Stall bit must
* be set in this packet."
*/
anv_add_pending_pipe_bits(cmd_buffer,
ANV_PIPE_RENDER_TARGET_CACHE_FLUSH_BIT |
ANV_PIPE_STALL_AT_SCOREBOARD_BIT,
"change RT");
bool has_color_att = false;
for (uint32_t i = 0; i < gfx->color_att_count; i++) {
if (pRenderingInfo->pColorAttachments[i].imageView != VK_NULL_HANDLE)
has_color_att = true;
}
if (has_color_att) {
/* The PIPE_CONTROL command description says:
*
* "Whenever a Binding Table Index (BTI) used by a Render Target Message
* points to a different RENDER_SURFACE_STATE, SW must issue a Render
* Target Cache Flush by enabling this bit. When render target flush
* is set due to new association of BTI, PS Scoreboard Stall bit must
* be set in this packet."
*
* We assume that a new BeginRendering is always changing the RTs, which
* may not be true and cause excessive flushing. We can trivially skip it
* in the case that there are no RTs (depth-only rendering), though.
*/
anv_add_pending_pipe_bits(cmd_buffer,
ANV_PIPE_RENDER_TARGET_CACHE_FLUSH_BIT |
ANV_PIPE_STALL_AT_SCOREBOARD_BIT,
"change RT");
}
#endif
cmd_buffer_emit_depth_stencil(cmd_buffer);