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intel/brw: Use brw prefix instead of namespace for dep analysis enum

Browse source 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33048>
This commit is contained in:
Caio Oliveira 2024-12-06 20:52:05 -08:00 • committed by Marge Bot
parent e2f354587d
commit 2b92eb0b2c
25 changed files with 171 additions and 153 deletions
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172
src/intel/compiler/brw_analysis.h
View file

@ -11,77 +11,75 @@
struct fs_visitor;
namespace brw {
/**
* Bitset of state categories that can influence the result of IR analysis
* passes.
*/
enum brw_analysis_dependency_class {
/**
* Bitset of state categories that can influence the result of IR analysis
* passes.
* The analysis doesn't depend on the IR, its result is effectively a
* constant during the compilation.
*/
enum analysis_dependency_class {
/**
* The analysis doesn't depend on the IR, its result is effectively a
* constant during the compilation.
*/
DEPENDENCY_NOTHING = 0,
/**
* The analysis depends on the set of instructions in the program and
* their naming. Note that because instructions are named sequentially
* by IP this implies a dependency on the control flow edges between
* instructions. This will be signaled whenever instructions are
* inserted, removed or reordered in the program.
*/
DEPENDENCY_INSTRUCTION_IDENTITY = 0x1,
/**
* The analysis is sensitive to the detailed semantics of instructions
* in the program, where "detailed" means any change in the instruction
* data structures other than the linked-list pointers (which are
* already covered by DEPENDENCY_INSTRUCTION_IDENTITY). E.g. changing
* the negate or abs flags of an instruction source would signal this
* flag alone because it would preserve all other instruction dependency
* classes.
*/
DEPENDENCY_INSTRUCTION_DETAIL = 0x2,
/**
* The analysis depends on the set of data flow edges between
* instructions. This will be signaled whenever the dataflow relation
* between instructions has potentially changed, e.g. when the VGRF
* index of an instruction source or destination changes (in which case
* it will appear in combination with DEPENDENCY_INSTRUCTION_DETAIL), or
* when data-dependent instructions are reordered (in which case it will
* appear in combination with DEPENDENCY_INSTRUCTION_IDENTITY).
*/
DEPENDENCY_INSTRUCTION_DATA_FLOW = 0x4,
/**
* The analysis depends on all instruction dependency classes. These
* will typically be signaled simultaneously when inserting or removing
* instructions in the program (or if you're feeling too lazy to read
* through your optimization pass to figure out which of the instruction
* dependency classes above it invalidates).
*/
DEPENDENCY_INSTRUCTIONS = 0x7,
/**
* The analysis depends on the set of VGRFs in the program and their
* naming. This will be signaled when VGRFs are allocated or released.
*/
DEPENDENCY_VARIABLES = 0x8,
/**
* The analysis depends on the set of basic blocks in the program, their
* control flow edges and naming.
*/
DEPENDENCY_BLOCKS = 0x10,
/**
* The analysis depends on the program being literally the same (good
* luck...), any change in the input invalidates previous analysis
* computations.
*/
DEPENDENCY_EVERYTHING = ~0
};
BRW_DEPENDENCY_NOTHING = 0,
/**
* The analysis depends on the set of instructions in the program and
* their naming. Note that because instructions are named sequentially
* by IP this implies a dependency on the control flow edges between
* instructions. This will be signaled whenever instructions are
* inserted, removed or reordered in the program.
*/
BRW_DEPENDENCY_INSTRUCTION_IDENTITY = 0x1,
/**
* The analysis is sensitive to the detailed semantics of instructions
* in the program, where "detailed" means any change in the instruction
* data structures other than the linked-list pointers (which are
* already covered by DEPENDENCY_INSTRUCTION_IDENTITY). E.g. changing
* the negate or abs flags of an instruction source would signal this
* flag alone because it would preserve all other instruction dependency
* classes.
*/
BRW_DEPENDENCY_INSTRUCTION_DETAIL = 0x2,
/**
* The analysis depends on the set of data flow edges between
* instructions. This will be signaled whenever the dataflow relation
* between instructions has potentially changed, e.g. when the VGRF
* index of an instruction source or destination changes (in which case
* it will appear in combination with DEPENDENCY_INSTRUCTION_DETAIL), or
* when data-dependent instructions are reordered (in which case it will
* appear in combination with DEPENDENCY_INSTRUCTION_IDENTITY).
*/
BRW_DEPENDENCY_INSTRUCTION_DATA_FLOW = 0x4,
/**
* The analysis depends on all instruction dependency classes. These
* will typically be signaled simultaneously when inserting or removing
* instructions in the program (or if you're feeling too lazy to read
* through your optimization pass to figure out which of the instruction
* dependency classes above it invalidates).
*/
BRW_DEPENDENCY_INSTRUCTIONS = 0x7,
/**
* The analysis depends on the set of VGRFs in the program and their
* naming. This will be signaled when VGRFs are allocated or released.
*/
BRW_DEPENDENCY_VARIABLES = 0x8,
/**
* The analysis depends on the set of basic blocks in the program, their
* control flow edges and naming.
*/
BRW_DEPENDENCY_BLOCKS = 0x10,
/**
* The analysis depends on the program being literally the same (good
* luck...), any change in the input invalidates previous analysis
* computations.
*/
BRW_DEPENDENCY_EVERYTHING = ~0
};
inline analysis_dependency_class
operator|(analysis_dependency_class x, analysis_dependency_class y)
{
return static_cast<analysis_dependency_class>(
static_cast<unsigned>(x) | static_cast<unsigned>(y));
}
inline brw_analysis_dependency_class
operator|(brw_analysis_dependency_class x, brw_analysis_dependency_class y)
{
return static_cast<brw_analysis_dependency_class>(
static_cast<unsigned>(x) | static_cast<unsigned>(y));
}
/**
@ -162,7 +160,7 @@ public:
* have to be discarded.
*/
void
invalidate(brw::analysis_dependency_class c)
invalidate(brw_analysis_dependency_class c)
{
if (p && (c & p->dependency_class())) {
delete p;
@ -190,10 +188,10 @@ namespace brw {
return true;
}
analysis_dependency_class
brw_analysis_dependency_class
dependency_class() const
{
return DEPENDENCY_BLOCKS;
return BRW_DEPENDENCY_BLOCKS;
}
const bblock_t *
@ -243,12 +241,12 @@ namespace brw {
register_pressure(const fs_visitor *v);
~register_pressure();
analysis_dependency_class
brw_analysis_dependency_class
dependency_class() const
{
return (DEPENDENCY_INSTRUCTION_IDENTITY |
DEPENDENCY_INSTRUCTION_DATA_FLOW |
DEPENDENCY_VARIABLES);
return (BRW_DEPENDENCY_INSTRUCTION_IDENTITY |
BRW_DEPENDENCY_INSTRUCTION_DATA_FLOW |
BRW_DEPENDENCY_VARIABLES);
}
bool
@ -292,13 +290,13 @@ namespace brw {
void print_stats(const fs_visitor *) const;
analysis_dependency_class
brw_analysis_dependency_class
dependency_class() const
{
return DEPENDENCY_INSTRUCTION_IDENTITY |
DEPENDENCY_INSTRUCTION_DATA_FLOW |
DEPENDENCY_VARIABLES |
DEPENDENCY_BLOCKS;
return BRW_DEPENDENCY_INSTRUCTION_IDENTITY |
BRW_DEPENDENCY_INSTRUCTION_DATA_FLOW |
BRW_DEPENDENCY_VARIABLES |
BRW_DEPENDENCY_BLOCKS;
}
bool validate(const fs_visitor *) const;
@ -360,12 +358,12 @@ namespace brw {
bool validate(const fs_visitor *s) const;
analysis_dependency_class
brw_analysis_dependency_class
dependency_class() const
{
return (DEPENDENCY_INSTRUCTION_IDENTITY |
DEPENDENCY_INSTRUCTION_DATA_FLOW |
DEPENDENCY_VARIABLES);
return (BRW_DEPENDENCY_INSTRUCTION_IDENTITY |
BRW_DEPENDENCY_INSTRUCTION_DATA_FLOW |
BRW_DEPENDENCY_VARIABLES);
}
bool vars_interfere(int a, int b) const;
@ -429,11 +427,11 @@ namespace brw {
performance(const fs_visitor *v);
~performance();
analysis_dependency_class
brw_analysis_dependency_class
dependency_class() const
{
return (DEPENDENCY_INSTRUCTIONS |
DEPENDENCY_BLOCKS);
return (BRW_DEPENDENCY_INSTRUCTIONS |
BRW_DEPENDENCY_BLOCKS);
}
bool

8
src/intel/compiler/brw_fs.cpp
View file

@ -314,7 +314,7 @@ fs_visitor::assign_curb_setup()
i += num_regs;
}
invalidate_analysis(DEPENDENCY_INSTRUCTIONS);
invalidate_analysis(BRW_DEPENDENCY_INSTRUCTIONS);
}
/* Map the offsets in the UNIFORM file to fixed HW regs. */
@ -392,7 +392,7 @@ fs_visitor::assign_curb_setup()
}
}
invalidate_analysis(DEPENDENCY_INSTRUCTIONS);
invalidate_analysis(BRW_DEPENDENCY_INSTRUCTIONS);
}
/* This may be updated in assign_urb_setup or assign_vs_urb_setup. */
@ -514,7 +514,7 @@ brw_fb_write_msg_control(const brw_inst *inst,
}
void
fs_visitor::invalidate_analysis(brw::analysis_dependency_class c)
fs_visitor::invalidate_analysis(brw_analysis_dependency_class c)
{
live_analysis.invalidate(c);
regpressure_analysis.invalidate(c);
@ -695,7 +695,7 @@ brw_allocate_registers(fs_visitor &s, bool allow_spilling)
/* Reset back to the original order before trying the next mode */
restore_instruction_order(s.cfg, orig_order);
s.invalidate_analysis(DEPENDENCY_INSTRUCTIONS);
s.invalidate_analysis(BRW_DEPENDENCY_INSTRUCTIONS);
}
ralloc_free(scheduler_ctx);

2
src/intel/compiler/brw_fs.h
View file

@ -196,7 +196,7 @@ public:
void calculate_payload_ranges(bool allow_spilling,
unsigned payload_node_count,
int *payload_last_use_ip) const;
void invalidate_analysis(brw::analysis_dependency_class c);
void invalidate_analysis(brw_analysis_dependency_class c);
void vfail(const char *msg, va_list args);
void fail(const char *msg, ...);

41
src/intel/compiler/brw_lower.cpp
View file

@ -95,7 +95,7 @@ brw_lower_load_payload(fs_visitor &s)
}
if (progress)
s.invalidate_analysis(DEPENDENCY_INSTRUCTIONS);
s.invalidate_analysis(BRW_DEPENDENCY_INSTRUCTIONS);
return progress;
}
@ -176,7 +176,7 @@ brw_lower_csel(fs_visitor &s)
}
if (progress)
s.invalidate_analysis(DEPENDENCY_INSTRUCTIONS);
s.invalidate_analysis(BRW_DEPENDENCY_INSTRUCTIONS);
return progress;
}
@ -260,7 +260,8 @@ brw_lower_sub_sat(fs_visitor &s)
}
if (progress)
s.invalidate_analysis(DEPENDENCY_INSTRUCTIONS | DEPENDENCY_VARIABLES);
s.invalidate_analysis(BRW_DEPENDENCY_INSTRUCTIONS |
BRW_DEPENDENCY_VARIABLES);
return progress;
}
@ -342,7 +343,8 @@ brw_lower_barycentrics(fs_visitor &s)
}
if (progress)
s.invalidate_analysis(DEPENDENCY_INSTRUCTIONS | DEPENDENCY_VARIABLES);
s.invalidate_analysis(BRW_DEPENDENCY_INSTRUCTIONS |
BRW_DEPENDENCY_VARIABLES);
return progress;
}
@ -401,7 +403,8 @@ brw_lower_derivatives(fs_visitor &s)
}
if (progress)
s.invalidate_analysis(DEPENDENCY_INSTRUCTIONS | DEPENDENCY_VARIABLES);
s.invalidate_analysis(BRW_DEPENDENCY_INSTRUCTIONS |
BRW_DEPENDENCY_VARIABLES);
return progress;
}
@ -496,7 +499,8 @@ brw_lower_find_live_channel(fs_visitor &s)
}
if (progress)
s.invalidate_analysis(DEPENDENCY_INSTRUCTIONS | DEPENDENCY_VARIABLES);
s.invalidate_analysis(BRW_DEPENDENCY_INSTRUCTIONS |
BRW_DEPENDENCY_VARIABLES);
return progress;
}
@ -548,7 +552,8 @@ brw_lower_sends_overlapping_payload(fs_visitor &s)
}
if (progress)
s.invalidate_analysis(DEPENDENCY_INSTRUCTIONS | DEPENDENCY_VARIABLES);
s.invalidate_analysis(BRW_DEPENDENCY_INSTRUCTIONS |
BRW_DEPENDENCY_VARIABLES);
return progress;
}
@ -571,8 +576,8 @@ brw_lower_3src_null_dest(fs_visitor &s)
}
if (progress)
s.invalidate_analysis(DEPENDENCY_INSTRUCTION_DETAIL |
DEPENDENCY_VARIABLES);
s.invalidate_analysis(BRW_DEPENDENCY_INSTRUCTION_DETAIL |
BRW_DEPENDENCY_VARIABLES);
return progress;
}
@ -657,8 +662,8 @@ brw_lower_alu_restrictions(fs_visitor &s)
}
if (progress) {
s.invalidate_analysis(DEPENDENCY_INSTRUCTION_DATA_FLOW |
DEPENDENCY_INSTRUCTION_DETAIL);
s.invalidate_analysis(BRW_DEPENDENCY_INSTRUCTION_DATA_FLOW |
BRW_DEPENDENCY_INSTRUCTION_DETAIL);
}
return progress;
@ -753,8 +758,8 @@ brw_lower_vgrfs_to_fixed_grfs(fs_visitor &s)
}
}
s.invalidate_analysis(DEPENDENCY_INSTRUCTION_DATA_FLOW |
DEPENDENCY_VARIABLES);
s.invalidate_analysis(BRW_DEPENDENCY_INSTRUCTION_DATA_FLOW |
BRW_DEPENDENCY_VARIABLES);
}
static brw_reg
@ -837,8 +842,8 @@ brw_lower_send_gather(fs_visitor &s)
}
if (progress)
s.invalidate_analysis(DEPENDENCY_INSTRUCTION_DATA_FLOW |
DEPENDENCY_VARIABLES);
s.invalidate_analysis(BRW_DEPENDENCY_INSTRUCTION_DATA_FLOW |
BRW_DEPENDENCY_VARIABLES);
return progress;
}
@ -877,7 +882,8 @@ brw_lower_load_subgroup_invocation(fs_visitor &s)
}
if (progress)
s.invalidate_analysis(DEPENDENCY_INSTRUCTIONS | DEPENDENCY_VARIABLES);
s.invalidate_analysis(BRW_DEPENDENCY_INSTRUCTIONS |
BRW_DEPENDENCY_VARIABLES);
return progress;
}
@ -946,7 +952,8 @@ brw_lower_indirect_mov(fs_visitor &s)
}
if (progress)
s.invalidate_analysis(DEPENDENCY_INSTRUCTIONS | DEPENDENCY_VARIABLES);
s.invalidate_analysis(BRW_DEPENDENCY_INSTRUCTIONS |
BRW_DEPENDENCY_VARIABLES);
return progress;
}

2
src/intel/compiler/brw_lower_dpas.cpp
View file

@ -297,7 +297,7 @@ brw_lower_dpas(fs_visitor &v)
}
if (progress)
v.invalidate_analysis(DEPENDENCY_INSTRUCTIONS);
v.invalidate_analysis(BRW_DEPENDENCY_INSTRUCTIONS);
return progress;
}

3
src/intel/compiler/brw_lower_integer_multiplication.cpp
View file

@ -454,7 +454,8 @@ brw_lower_integer_multiplication(fs_visitor &s)
}
if (progress)
s.invalidate_analysis(DEPENDENCY_INSTRUCTIONS | DEPENDENCY_VARIABLES);
s.invalidate_analysis(BRW_DEPENDENCY_INSTRUCTIONS |
BRW_DEPENDENCY_VARIABLES);
return progress;
}

11
src/intel/compiler/brw_lower_logical_sends.cpp
View file

@ -2511,7 +2511,8 @@ brw_lower_logical_sends(fs_visitor &s)
}
if (progress)
s.invalidate_analysis(DEPENDENCY_INSTRUCTIONS | DEPENDENCY_VARIABLES);
s.invalidate_analysis(BRW_DEPENDENCY_INSTRUCTIONS |
BRW_DEPENDENCY_VARIABLES);
return progress;
}
@ -2587,7 +2588,8 @@ brw_lower_uniform_pull_constant_loads(fs_visitor &s)
surface : surface_handle);
inst->src[2] = payload;
s.invalidate_analysis(DEPENDENCY_INSTRUCTIONS | DEPENDENCY_VARIABLES);
s.invalidate_analysis(BRW_DEPENDENCY_INSTRUCTIONS |
BRW_DEPENDENCY_VARIABLES);
} else {
const brw_builder ubld = brw_builder(&s, block, inst).exec_all();
brw_reg header = brw_builder(&s, 8).exec_all().vgrf(BRW_TYPE_UD);
@ -2613,7 +2615,8 @@ brw_lower_uniform_pull_constant_loads(fs_visitor &s)
inst->src[2] = header;
inst->src[3] = brw_reg(); /* unused for reads */
s.invalidate_analysis(DEPENDENCY_INSTRUCTIONS | DEPENDENCY_VARIABLES);
s.invalidate_analysis(BRW_DEPENDENCY_INSTRUCTIONS |
BRW_DEPENDENCY_VARIABLES);
}
progress = true;
@ -2700,7 +2703,7 @@ brw_lower_send_descriptors(fs_visitor &s)
}
progress = true;
s.invalidate_analysis(DEPENDENCY_INSTRUCTIONS | DEPENDENCY_VARIABLES);
s.invalidate_analysis(BRW_DEPENDENCY_INSTRUCTIONS | BRW_DEPENDENCY_VARIABLES);
}
return progress;

2
src/intel/compiler/brw_lower_pack.cpp
View file

@ -79,7 +79,7 @@ brw_lower_pack(fs_visitor &s)
}
if (progress)
s.invalidate_analysis(DEPENDENCY_INSTRUCTIONS);
s.invalidate_analysis(BRW_DEPENDENCY_INSTRUCTIONS);
return progress;
}

3
src/intel/compiler/brw_lower_regioning.cpp
View file

@ -809,7 +809,8 @@ brw_lower_regioning(fs_visitor &s)
progress |= lower_instruction(&s, block, inst);
if (progress)
s.invalidate_analysis(DEPENDENCY_INSTRUCTIONS | DEPENDENCY_VARIABLES);
s.invalidate_analysis(BRW_DEPENDENCY_INSTRUCTIONS |
BRW_DEPENDENCY_VARIABLES);
return progress;
}

3
src/intel/compiler/brw_lower_simd_width.cpp
View file

@ -756,7 +756,8 @@ brw_lower_simd_width(fs_visitor &s)
}
if (progress)
s.invalidate_analysis(DEPENDENCY_INSTRUCTIONS | DEPENDENCY_VARIABLES);
s.invalidate_analysis(BRW_DEPENDENCY_INSTRUCTIONS |
BRW_DEPENDENCY_VARIABLES);
return progress;
}

3
src/intel/compiler/brw_lower_subgroup_ops.cpp
View file

@ -697,7 +697,8 @@ brw_lower_subgroup_ops(fs_visitor &s)
}
if (progress)
s.invalidate_analysis(DEPENDENCY_INSTRUCTIONS | DEPENDENCY_VARIABLES);
s.invalidate_analysis(BRW_DEPENDENCY_INSTRUCTIONS |
BRW_DEPENDENCY_VARIABLES);
return progress;
}

19
src/intel/compiler/brw_opt.cpp
View file

@ -287,7 +287,7 @@ brw_opt_zero_samples(fs_visitor &s)
}
if (progress)
s.invalidate_analysis(DEPENDENCY_INSTRUCTION_DETAIL);
s.invalidate_analysis(BRW_DEPENDENCY_INSTRUCTION_DETAIL);
return progress;
}
@ -374,7 +374,8 @@ brw_opt_split_sends(fs_visitor &s)
}
if (progress)
s.invalidate_analysis(DEPENDENCY_INSTRUCTIONS | DEPENDENCY_VARIABLES);
s.invalidate_analysis(BRW_DEPENDENCY_INSTRUCTIONS |
BRW_DEPENDENCY_VARIABLES);
return progress;
}
@ -427,7 +428,7 @@ brw_opt_remove_redundant_halts(fs_visitor &s)
}
if (progress)
s.invalidate_analysis(DEPENDENCY_INSTRUCTIONS);
s.invalidate_analysis(BRW_DEPENDENCY_INSTRUCTIONS);
return progress;
}
@ -518,7 +519,7 @@ brw_opt_eliminate_find_live_channel(fs_visitor &s)
out:
if (progress)
s.invalidate_analysis(DEPENDENCY_INSTRUCTION_DETAIL);
s.invalidate_analysis(BRW_DEPENDENCY_INSTRUCTION_DETAIL);
return progress;
}
@ -567,7 +568,7 @@ brw_opt_remove_extra_rounding_modes(fs_visitor &s)
}
if (progress)
s.invalidate_analysis(DEPENDENCY_INSTRUCTIONS);
s.invalidate_analysis(BRW_DEPENDENCY_INSTRUCTIONS);
return progress;
}
@ -643,8 +644,8 @@ brw_opt_send_to_send_gather(fs_visitor &s)
}
if (progress)
s.invalidate_analysis(DEPENDENCY_INSTRUCTION_DETAIL |
DEPENDENCY_INSTRUCTION_DATA_FLOW);
s.invalidate_analysis(BRW_DEPENDENCY_INSTRUCTION_DETAIL |
BRW_DEPENDENCY_INSTRUCTION_DATA_FLOW);
return progress;
}
@ -744,8 +745,8 @@ brw_opt_send_gather_to_send(fs_visitor &s)
}
if (progress) {
s.invalidate_analysis(DEPENDENCY_INSTRUCTION_DETAIL |
DEPENDENCY_INSTRUCTION_DATA_FLOW);
s.invalidate_analysis(BRW_DEPENDENCY_INSTRUCTION_DETAIL |
BRW_DEPENDENCY_INSTRUCTION_DATA_FLOW);
}
return progress;

2
src/intel/compiler/brw_opt_address_reg_load.cpp
View file

@ -68,7 +68,7 @@ brw_opt_address_reg_load(fs_visitor &s)
if (progress) {
s.cfg->adjust_block_ips();
s.invalidate_analysis(DEPENDENCY_INSTRUCTIONS);
s.invalidate_analysis(BRW_DEPENDENCY_INSTRUCTIONS);
}
return progress;

4
src/intel/compiler/brw_opt_algebraic.cpp
View file

@ -725,8 +725,8 @@ brw_opt_algebraic(fs_visitor &s)
}
if (progress)
s.invalidate_analysis(DEPENDENCY_INSTRUCTION_DATA_FLOW |
DEPENDENCY_INSTRUCTION_DETAIL);
s.invalidate_analysis(BRW_DEPENDENCY_INSTRUCTION_DATA_FLOW |
BRW_DEPENDENCY_INSTRUCTION_DETAIL);
return progress;
}

2
src/intel/compiler/brw_opt_cmod_propagation.cpp
View file

@ -569,7 +569,7 @@ brw_opt_cmod_propagation(fs_visitor &s)
if (progress) {
s.cfg->adjust_block_ips();
s.invalidate_analysis(DEPENDENCY_INSTRUCTIONS);
s.invalidate_analysis(BRW_DEPENDENCY_INSTRUCTIONS);
}
return progress;

4
src/intel/compiler/brw_opt_combine_constants.cpp
View file

@ -1794,8 +1794,8 @@ brw_opt_combine_constants(fs_visitor &s)
ralloc_free(const_ctx);
s.invalidate_analysis(DEPENDENCY_INSTRUCTIONS | DEPENDENCY_VARIABLES |
(rebuild_cfg ? DEPENDENCY_BLOCKS : DEPENDENCY_NOTHING));
s.invalidate_analysis(BRW_DEPENDENCY_INSTRUCTIONS | BRW_DEPENDENCY_VARIABLES |
(rebuild_cfg ? BRW_DEPENDENCY_BLOCKS : BRW_DEPENDENCY_NOTHING));
return true;
}

8
src/intel/compiler/brw_opt_copy_propagation.cpp
View file

@ -1479,8 +1479,8 @@ brw_opt_copy_propagation(fs_visitor &s)
ralloc_free(copy_prop_ctx);
if (progress)
s.invalidate_analysis(DEPENDENCY_INSTRUCTION_DATA_FLOW |
DEPENDENCY_INSTRUCTION_DETAIL);
s.invalidate_analysis(BRW_DEPENDENCY_INSTRUCTION_DATA_FLOW |
BRW_DEPENDENCY_INSTRUCTION_DETAIL);
return progress;
}
@ -1888,8 +1888,8 @@ brw_opt_copy_propagation_defs(fs_visitor &s)
if (progress) {
s.cfg->adjust_block_ips();
s.invalidate_analysis(DEPENDENCY_INSTRUCTION_DATA_FLOW |
DEPENDENCY_INSTRUCTION_DETAIL);
s.invalidate_analysis(BRW_DEPENDENCY_INSTRUCTION_DATA_FLOW |
BRW_DEPENDENCY_INSTRUCTION_DETAIL);
}
delete [] uses_deleted;

4
src/intel/compiler/brw_opt_cse.cpp
View file

@ -514,8 +514,8 @@ out:
if (progress) {
s.cfg->adjust_block_ips();
s.invalidate_analysis(DEPENDENCY_INSTRUCTION_DATA_FLOW |
DEPENDENCY_INSTRUCTION_DETAIL);
s.invalidate_analysis(BRW_DEPENDENCY_INSTRUCTION_DATA_FLOW |
BRW_DEPENDENCY_INSTRUCTION_DETAIL);
}
return progress;

2
src/intel/compiler/brw_opt_dead_code_eliminate.cpp
View file

@ -177,7 +177,7 @@ brw_opt_dead_code_eliminate(fs_visitor &s)
ralloc_free(flag_live);
if (progress)
s.invalidate_analysis(DEPENDENCY_INSTRUCTIONS);
s.invalidate_analysis(BRW_DEPENDENCY_INSTRUCTIONS);
return progress;
}

2
src/intel/compiler/brw_opt_register_coalesce.cpp
View file

@ -377,7 +377,7 @@ brw_opt_register_coalesce(fs_visitor &s)
s.cfg->adjust_block_ips();
s.invalidate_analysis(DEPENDENCY_INSTRUCTIONS);
s.invalidate_analysis(BRW_DEPENDENCY_INSTRUCTIONS);
}
delete[] src_var;

2
src/intel/compiler/brw_opt_txf_combiner.cpp
View file

@ -230,7 +230,7 @@ brw_opt_combine_convergent_txf(fs_visitor &s)
}
if (progress)
s.invalidate_analysis(DEPENDENCY_INSTRUCTIONS);
s.invalidate_analysis(BRW_DEPENDENCY_INSTRUCTIONS);
return progress;
}

6
src/intel/compiler/brw_opt_virtual_grfs.cpp
View file

@ -197,7 +197,8 @@ brw_opt_split_virtual_grfs(fs_visitor &s)
}
}
}
s.invalidate_analysis(DEPENDENCY_INSTRUCTION_DETAIL | DEPENDENCY_VARIABLES);
s.invalidate_analysis(BRW_DEPENDENCY_INSTRUCTION_DETAIL |
BRW_DEPENDENCY_VARIABLES);
progress = true;
@ -249,7 +250,8 @@ brw_opt_compact_virtual_grfs(fs_visitor &s)
} else {
remap_table[i] = new_index;
s.alloc.sizes[new_index] = s.alloc.sizes[i];
s.invalidate_analysis(DEPENDENCY_INSTRUCTION_DETAIL | DEPENDENCY_VARIABLES);
s.invalidate_analysis(BRW_DEPENDENCY_INSTRUCTION_DETAIL |
BRW_DEPENDENCY_VARIABLES);
++new_index;
}
}

3
src/intel/compiler/brw_reg_allocate.cpp
View file

@ -1303,7 +1303,8 @@ brw_reg_alloc::assign_regs(bool allow_spilling, bool spill_all)
}
if (spilled)
fs->invalidate_analysis(DEPENDENCY_INSTRUCTIONS | DEPENDENCY_VARIABLES);
fs->invalidate_analysis(BRW_DEPENDENCY_INSTRUCTIONS |
BRW_DEPENDENCY_VARIABLES);
/* Get the chosen virtual registers for each node, and map virtual
* regs in the register classes back down to real hardware reg

4
src/intel/compiler/brw_schedule_instructions.cpp
View file

@ -1839,7 +1839,7 @@ brw_schedule_instructions_pre_ra(fs_visitor &s, brw_instruction_scheduler *sched
sched->run(mode);
s.invalidate_analysis(DEPENDENCY_INSTRUCTIONS);
s.invalidate_analysis(BRW_DEPENDENCY_INSTRUCTIONS);
}
void
@ -1856,5 +1856,5 @@ brw_schedule_instructions_post_ra(fs_visitor &s)
ralloc_free(mem_ctx);
s.invalidate_analysis(DEPENDENCY_INSTRUCTIONS);
s.invalidate_analysis(BRW_DEPENDENCY_INSTRUCTIONS);
}

12
src/intel/compiler/brw_workaround.cpp
View file

@ -34,7 +34,8 @@ brw_workaround_emit_dummy_mov_instruction(fs_visitor &s)
brw_builder(&s, s.cfg->first_block(), (brw_inst *)first_inst).exec_all().group(8, 0);
ubld.MOV(ubld.null_reg_ud(), brw_imm_ud(0u));
s.invalidate_analysis(DEPENDENCY_INSTRUCTIONS | DEPENDENCY_VARIABLES);
s.invalidate_analysis(BRW_DEPENDENCY_INSTRUCTIONS |
BRW_DEPENDENCY_VARIABLES);
return true;
}
@ -118,8 +119,8 @@ brw_workaround_memory_fence_before_eot(fs_visitor &s)
}
if (progress) {
s.invalidate_analysis(DEPENDENCY_INSTRUCTIONS |
DEPENDENCY_VARIABLES);
s.invalidate_analysis(BRW_DEPENDENCY_INSTRUCTIONS |
BRW_DEPENDENCY_VARIABLES);
}
return progress;
@ -267,7 +268,8 @@ brw_workaround_nomask_control_flow(fs_visitor &s)
}
if (progress)
s.invalidate_analysis(DEPENDENCY_INSTRUCTIONS | DEPENDENCY_VARIABLES);
s.invalidate_analysis(BRW_DEPENDENCY_INSTRUCTIONS |
BRW_DEPENDENCY_VARIABLES);
return progress;
}
@ -354,7 +356,7 @@ brw_workaround_source_arf_before_eot(fs_visitor &s)
}
progress = true;
s.invalidate_analysis(DEPENDENCY_INSTRUCTIONS);
s.invalidate_analysis(BRW_DEPENDENCY_INSTRUCTIONS);
}
return progress;