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broadcom/compiler: lift restriction for branch + msfign after setmsf for v7.x

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Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
This commit is contained in:
Iago Toral Quiroga 2021-11-25 08:31:02 +01:00 • committed by Marge Bot
parent 5e9b405aa7
commit 2b39bb35c5
1 changed files with 2 additions and 1 deletions
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3
src/broadcom/compiler/qpu_schedule.c
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@ -2373,10 +2373,11 @@ emit_branch(struct v3d_compile *c,
assert(scoreboard->last_branch_tick + 3 < branch_tick); assert(scoreboard->last_branch_tick + 3 < branch_tick);
assert(scoreboard->last_unifa_write_tick + 3 < branch_tick); assert(scoreboard->last_unifa_write_tick + 3 < branch_tick);
/* Can't place a branch with msfign != 0 and cond != 0,2,3 after /* V3D 4.x can't place a branch with msfign != 0 and cond != 0,2,3 after
* setmsf. * setmsf.
*/ */
bool is_safe_msf_branch = bool is_safe_msf_branch =
c->devinfo->ver >= 71 ||
inst->qpu.branch.msfign == V3D_QPU_MSFIGN_NONE || inst->qpu.branch.msfign == V3D_QPU_MSFIGN_NONE ||
inst->qpu.branch.cond == V3D_QPU_BRANCH_COND_ALWAYS || inst->qpu.branch.cond == V3D_QPU_BRANCH_COND_ALWAYS ||
inst->qpu.branch.cond == V3D_QPU_BRANCH_COND_A0 || inst->qpu.branch.cond == V3D_QPU_BRANCH_COND_A0 ||