mirror of
https://gitlab.freedesktop.org/mesa/mesa.git
synced 2025-12-24 00:10:10 +01:00
radv: move to using nir clip/cull merge pass.
Doing this before tessellation makes doing some bits of tessellation a bit cleaner. It also cleans up a bit of the llvm generator code. Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net> Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Signed-off-by: Dave Airlie <airlied@redhat.com>
This commit is contained in:
Dave Airlie
parent
5079c277b5
commit
2b35b60df1
2 changed files with 40 additions and 112 deletions
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@ -144,8 +144,6 @@ struct nir_to_llvm_context {
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int num_locals;
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LLVMValueRef *locals;
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bool has_ddxy;
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uint8_t num_input_clips;
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uint8_t num_input_culls;
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uint8_t num_output_clips;
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uint8_t num_output_culls;
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@ -170,12 +168,9 @@ static unsigned shader_io_get_unique_index(gl_varying_slot slot)
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return 0;
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if (slot == VARYING_SLOT_PSIZ)
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return 1;
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if (slot == VARYING_SLOT_CLIP_DIST0 ||
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slot == VARYING_SLOT_CULL_DIST0)
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if (slot == VARYING_SLOT_CLIP_DIST0)
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return 2;
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if (slot == VARYING_SLOT_CLIP_DIST1 ||
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slot == VARYING_SLOT_CULL_DIST1)
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return 3;
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/* 3 is reserved for clip dist as well */
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if (slot >= VARYING_SLOT_VAR0 && slot <= VARYING_SLOT_VAR31)
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return 4 + (slot - VARYING_SLOT_VAR0);
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unreachable("illegal slot in get unique index\n");
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@ -2162,7 +2157,6 @@ load_gs_input(struct nir_to_llvm_context *ctx,
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unsigned param, vtx_offset_param;
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LLVMValueRef value[4], result;
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unsigned vertex_index;
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unsigned cull_offset = 0;
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radv_get_deref_offset(ctx, &instr->variables[0]->deref,
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false, &vertex_index,
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&const_index, &indir_index);
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@ -2172,13 +2166,11 @@ load_gs_input(struct nir_to_llvm_context *ctx,
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LLVMConstInt(ctx->i32, 4, false), "");
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param = shader_io_get_unique_index(instr->variables[0]->var->data.location);
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if (instr->variables[0]->var->data.location == VARYING_SLOT_CULL_DIST0)
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cull_offset += ctx->num_input_clips;
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for (unsigned i = 0; i < instr->num_components; i++) {
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args[0] = ctx->esgs_ring;
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args[1] = vtx_offset;
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args[2] = LLVMConstInt(ctx->i32, (param * 4 + i + const_index + cull_offset) * 256, false);
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args[2] = LLVMConstInt(ctx->i32, (param * 4 + i + const_index) * 256, false);
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args[3] = ctx->i32zero;
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args[4] = ctx->i32one; /* OFFEN */
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args[5] = ctx->i32zero; /* IDXEN */
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@ -2333,8 +2325,7 @@ visit_store_var(struct nir_to_llvm_context *ctx,
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value = llvm_extract_elem(ctx, src, chan);
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if (instr->variables[0]->var->data.location == VARYING_SLOT_CLIP_DIST0 ||
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instr->variables[0]->var->data.location == VARYING_SLOT_CULL_DIST0)
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if (instr->variables[0]->var->data.compact)
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stride = 1;
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if (indir_index) {
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unsigned count = glsl_count_attribute_slots(
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@ -3090,7 +3081,7 @@ visit_emit_vertex(struct nir_to_llvm_context *ctx,
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LLVMValueRef gs_next_vertex;
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LLVMValueRef can_emit, kill;
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int idx;
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int clip_cull_slot = -1;
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assert(instr->const_index[0] == 0);
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/* Write vertex attribute values to GSVS ring */
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gs_next_vertex = LLVMBuildLoad(ctx->builder,
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@ -3115,39 +3106,22 @@ visit_emit_vertex(struct nir_to_llvm_context *ctx,
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for (unsigned i = 0; i < RADEON_LLVM_MAX_OUTPUTS; ++i) {
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LLVMValueRef *out_ptr = &ctx->outputs[i * 4];
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int length = 4;
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int start = 0;
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int slot = idx;
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int slot_inc = 1;
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if (!(ctx->output_mask & (1ull << i)))
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continue;
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if (i == VARYING_SLOT_CLIP_DIST1 ||
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i == VARYING_SLOT_CULL_DIST1)
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continue;
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if (i == VARYING_SLOT_CLIP_DIST0 ||
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i == VARYING_SLOT_CULL_DIST0) {
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if (i == VARYING_SLOT_CLIP_DIST0) {
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/* pack clip and cull into a single set of slots */
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if (clip_cull_slot == -1) {
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clip_cull_slot = idx;
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if (ctx->num_output_clips + ctx->num_output_culls > 4)
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slot_inc = 2;
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} else {
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slot = clip_cull_slot;
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slot_inc = 0;
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}
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if (i == VARYING_SLOT_CLIP_DIST0)
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length = ctx->num_output_clips;
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if (i == VARYING_SLOT_CULL_DIST0) {
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start = ctx->num_output_clips;
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length = ctx->num_output_culls;
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}
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length = ctx->num_output_clips + ctx->num_output_culls;
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if (length > 4)
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slot_inc = 2;
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}
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for (unsigned j = 0; j < length; j++) {
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LLVMValueRef out_val = LLVMBuildLoad(ctx->builder,
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out_ptr[j], "");
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LLVMValueRef voffset = LLVMConstInt(ctx->i32, (slot * 4 + j + start) * ctx->gs_max_out_vertices, false);
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LLVMValueRef voffset = LLVMConstInt(ctx->i32, (slot * 4 + j) * ctx->gs_max_out_vertices, false);
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voffset = LLVMBuildAdd(ctx->builder, voffset, gs_next_vertex, "");
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voffset = LLVMBuildMul(ctx->builder, voffset, LLVMConstInt(ctx->i32, 4, false), "");
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@ -4026,22 +4000,6 @@ handle_vs_input_decl(struct nir_to_llvm_context *ctx,
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}
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}
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static void
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handle_gs_input_decl(struct nir_to_llvm_context *ctx,
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struct nir_variable *variable)
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{
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int idx = variable->data.location;
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if (idx == VARYING_SLOT_CLIP_DIST0 ||
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idx == VARYING_SLOT_CULL_DIST0) {
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int length = glsl_get_length(glsl_get_array_element(variable->type));
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if (idx == VARYING_SLOT_CLIP_DIST0)
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ctx->num_input_clips = length;
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else
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ctx->num_input_culls = length;
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}
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}
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static void interp_fs_input(struct nir_to_llvm_context *ctx,
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unsigned attr,
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LLVMValueRef interp_param,
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@ -4134,9 +4092,6 @@ handle_shader_input_decl(struct nir_to_llvm_context *ctx,
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case MESA_SHADER_FRAGMENT:
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handle_fs_input_decl(ctx, variable);
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break;
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case MESA_SHADER_GEOMETRY:
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handle_gs_input_decl(ctx, variable);
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break;
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default:
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break;
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}
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@ -4223,29 +4178,26 @@ handle_shader_output_decl(struct nir_to_llvm_context *ctx,
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{
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int idx = variable->data.location + variable->data.index;
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unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
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unsigned mask_attribs;
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variable->data.driver_location = idx * 4;
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if (ctx->stage == MESA_SHADER_VERTEX ||
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ctx->stage == MESA_SHADER_GEOMETRY) {
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if (idx == VARYING_SLOT_CLIP_DIST0 ||
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idx == VARYING_SLOT_CULL_DIST0) {
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int length = glsl_get_length(variable->type);
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if (idx == VARYING_SLOT_CLIP_DIST0) {
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if (ctx->stage == MESA_SHADER_VERTEX)
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ctx->shader_info->vs.outinfo.clip_dist_mask = (1 << length) - 1;
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ctx->num_output_clips = length;
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} else if (idx == VARYING_SLOT_CULL_DIST0) {
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if (ctx->stage == MESA_SHADER_VERTEX)
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ctx->shader_info->vs.outinfo.cull_dist_mask = (1 << length) - 1;
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ctx->num_output_culls = length;
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if (idx == VARYING_SLOT_CLIP_DIST0) {
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int length = ctx->num_output_clips + ctx->num_output_culls;
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if (ctx->stage == MESA_SHADER_VERTEX) {
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ctx->shader_info->vs.outinfo.clip_dist_mask = (1 << ctx->num_output_clips) - 1;
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ctx->shader_info->vs.outinfo.cull_dist_mask = (1 << ctx->num_output_culls) - 1;
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}
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if (length > 4)
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attrib_count = 2;
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else
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attrib_count = 1;
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}
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}
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mask_attribs = 1 << idx;
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} else
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mask_attribs = ((1ull << attrib_count) - 1) << idx;
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for (unsigned i = 0; i < attrib_count; ++i) {
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for (unsigned chan = 0; chan < 4; chan++) {
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@ -4253,7 +4205,7 @@ handle_shader_output_decl(struct nir_to_llvm_context *ctx,
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si_build_alloca_undef(ctx, ctx->f32, "");
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}
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}
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ctx->output_mask |= ((1ull << attrib_count) - 1) << idx;
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ctx->output_mask |= mask_attribs;
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}
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static void
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@ -4462,14 +4414,10 @@ handle_vs_outputs_post(struct nir_to_llvm_context *ctx,
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struct ac_export_args args, pos_args[4] = {};
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LLVMValueRef psize_value = NULL, layer_value = NULL, viewport_index_value = NULL;
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int i;
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const uint64_t clip_mask = ctx->output_mask & ((1ull << VARYING_SLOT_CLIP_DIST0) |
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(1ull << VARYING_SLOT_CLIP_DIST1) |
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(1ull << VARYING_SLOT_CULL_DIST0) |
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(1ull << VARYING_SLOT_CULL_DIST1));
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outinfo->prim_id_output = 0xffffffff;
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outinfo->layer_output = 0xffffffff;
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if (clip_mask) {
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if (ctx->output_mask & (1ull << VARYING_SLOT_CLIP_DIST0)) {
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LLVMValueRef slots[8];
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unsigned j;
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@ -4477,13 +4425,9 @@ handle_vs_outputs_post(struct nir_to_llvm_context *ctx,
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outinfo->cull_dist_mask <<= ctx->num_output_clips;
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i = VARYING_SLOT_CLIP_DIST0;
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for (j = 0; j < ctx->num_output_clips; j++)
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for (j = 0; j < ctx->num_output_clips + ctx->num_output_culls; j++)
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slots[j] = to_float(ctx, LLVMBuildLoad(ctx->builder,
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ctx->outputs[radeon_llvm_reg_index_soa(i, j)], ""));
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i = VARYING_SLOT_CULL_DIST0;
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for (j = 0; j < ctx->num_output_culls; j++)
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slots[ctx->num_output_clips + j] = to_float(ctx, LLVMBuildLoad(ctx->builder,
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ctx->outputs[radeon_llvm_reg_index_soa(i, j)], ""));
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for (i = ctx->num_output_clips + ctx->num_output_culls; i < 8; i++)
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slots[i] = LLVMGetUndef(ctx->f32);
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@ -4513,10 +4457,7 @@ handle_vs_outputs_post(struct nir_to_llvm_context *ctx,
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if (i == VARYING_SLOT_POS) {
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target = V_008DFC_SQ_EXP_POS;
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} else if (i == VARYING_SLOT_CLIP_DIST0 ||
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i == VARYING_SLOT_CLIP_DIST1 ||
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i == VARYING_SLOT_CULL_DIST0 ||
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i == VARYING_SLOT_CULL_DIST1) {
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} else if (i == VARYING_SLOT_CLIP_DIST0) {
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continue;
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} else if (i == VARYING_SLOT_PSIZ) {
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outinfo->writes_pointsize = true;
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@ -4622,12 +4563,9 @@ handle_es_outputs_post(struct nir_to_llvm_context *ctx,
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if (!(ctx->output_mask & (1ull << i)))
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continue;
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if (i == VARYING_SLOT_CLIP_DIST0) {
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length = ctx->num_output_clips;
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} else if (i == VARYING_SLOT_CULL_DIST0) {
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start = ctx->num_output_clips;
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length = ctx->num_output_culls;
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}
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if (i == VARYING_SLOT_CLIP_DIST0)
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length = ctx->num_output_clips + ctx->num_output_culls;
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param_index = shader_io_get_unique_index(i);
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if (param_index > max_output_written)
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@ -4922,6 +4860,9 @@ LLVMModuleRef ac_translate_nir_to_llvm(LLVMTargetMachineRef tm,
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if (nir->stage == MESA_SHADER_FRAGMENT)
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handle_fs_inputs_pre(&ctx, nir);
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ctx.num_output_clips = nir->info->clip_distance_array_size;
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ctx.num_output_culls = nir->info->cull_distance_array_size;
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nir_foreach_variable(variable, &nir->outputs)
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handle_shader_output_decl(&ctx, variable);
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@ -5128,42 +5069,25 @@ ac_gs_copy_shader_emit(struct nir_to_llvm_context *ctx)
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args[8] = ctx->i32zero; /* TFE */
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int idx = 0;
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int clip_cull_slot = -1;
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for (unsigned i = 0; i < RADEON_LLVM_MAX_OUTPUTS; ++i) {
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int length = 4;
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int start = 0;
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int slot = idx;
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int slot_inc = 1;
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if (!(ctx->output_mask & (1ull << i)))
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continue;
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if (i == VARYING_SLOT_CLIP_DIST1 ||
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i == VARYING_SLOT_CULL_DIST1)
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continue;
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if (i == VARYING_SLOT_CLIP_DIST0 ||
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i == VARYING_SLOT_CULL_DIST0) {
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if (i == VARYING_SLOT_CLIP_DIST0) {
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/* unpack clip and cull from a single set of slots */
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if (clip_cull_slot == -1) {
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clip_cull_slot = idx;
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if (ctx->num_output_clips + ctx->num_output_culls > 4)
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slot_inc = 2;
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} else {
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slot = clip_cull_slot;
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slot_inc = 0;
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}
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if (i == VARYING_SLOT_CLIP_DIST0)
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length = ctx->num_output_clips;
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if (i == VARYING_SLOT_CULL_DIST0) {
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start = ctx->num_output_clips;
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length = ctx->num_output_culls;
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}
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length = ctx->num_output_clips + ctx->num_output_culls;
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if (length > 4)
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slot_inc = 2;
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}
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for (unsigned j = 0; j < length; j++) {
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LLVMValueRef value;
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args[2] = LLVMConstInt(ctx->i32,
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(slot * 4 + j + start) *
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(slot * 4 + j) *
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ctx->gs_max_out_vertices * 16 * 4, false);
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value = ac_build_intrinsic(&ctx->ac,
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@ -5210,6 +5134,9 @@ void ac_create_gs_copy_shader(LLVMTargetMachineRef tm,
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ctx.gs_max_out_vertices = geom_shader->info->gs.vertices_out;
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ac_setup_rings(&ctx);
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ctx.num_output_clips = geom_shader->info->clip_distance_array_size;
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ctx.num_output_culls = geom_shader->info->cull_distance_array_size;
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nir_foreach_variable(variable, &geom_shader->outputs)
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handle_shader_output_decl(&ctx, variable);
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@ -246,6 +246,7 @@ radv_shader_compile_to_nir(struct radv_device *device,
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*/
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NIR_PASS_V(nir, nir_lower_constant_initializers, ~0);
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NIR_PASS_V(nir, nir_lower_system_values);
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NIR_PASS_V(nir, nir_lower_clip_cull_distance_arrays);
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}
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/* Vulkan uses the separate-shader linking model */
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