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radv: Use a struct for the trace_bo layout
Now we can use the members on the CPU side and offsetof on the GPU side instead of magic offsets. Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28838>
This commit is contained in:
Konstantin
Marge Bot
parent
575565af58
commit
2b2f67aa2b
5 changed files with 34 additions and 47 deletions
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@ -572,8 +572,10 @@ radv_cmd_buffer_trace_emit(struct radv_cmd_buffer *cmd_buffer)
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return;
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va = radv_buffer_get_va(device->trace_bo);
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if (cmd_buffer->vk.level == VK_COMMAND_BUFFER_LEVEL_SECONDARY)
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va += 4;
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if (cmd_buffer->vk.level == VK_COMMAND_BUFFER_LEVEL_PRIMARY)
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va += offsetof(struct radv_trace_data, primary_id);
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else
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va += offsetof(struct radv_trace_data, secondary_id);
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++cmd_buffer->state.trace_id;
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radv_write_data(cmd_buffer, V_370_ME, va, 1, &cmd_buffer->state.trace_id, false);
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@ -830,10 +832,10 @@ radv_save_pipeline(struct radv_cmd_buffer *cmd_buffer, struct radv_pipeline *pip
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switch (ring) {
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case AMD_IP_GFX:
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va += 8;
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va += offsetof(struct radv_trace_data, gfx_ring_pipeline);
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break;
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case AMD_IP_COMPUTE:
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va += 16;
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va += offsetof(struct radv_trace_data, comp_ring_pipeline);
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break;
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default:
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assert(!"invalid IP type");
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@ -853,8 +855,7 @@ radv_save_vertex_descriptors(struct radv_cmd_buffer *cmd_buffer, uint64_t vb_ptr
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uint32_t data[2];
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uint64_t va;
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va = radv_buffer_get_va(device->trace_bo);
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va += 24;
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va = radv_buffer_get_va(device->trace_bo) + offsetof(struct radv_trace_data, vertex_descriptors);
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data[0] = vb_ptr;
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data[1] = vb_ptr >> 32;
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@ -869,8 +870,7 @@ radv_save_vs_prolog(struct radv_cmd_buffer *cmd_buffer, const struct radv_shader
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uint32_t data[2];
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uint64_t va;
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va = radv_buffer_get_va(device->trace_bo);
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va += 32;
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va = radv_buffer_get_va(device->trace_bo) + offsetof(struct radv_trace_data, vertex_prolog);
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uint64_t prolog_address = (uintptr_t)prolog;
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data[0] = prolog_address;
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@ -898,7 +898,7 @@ radv_save_descriptors(struct radv_cmd_buffer *cmd_buffer, VkPipelineBindPoint bi
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struct radv_device *device = radv_cmd_buffer_device(cmd_buffer);
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uint32_t data[MAX_SETS * 2] = {0};
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uint64_t va;
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va = radv_buffer_get_va(device->trace_bo) + 40;
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va = radv_buffer_get_va(device->trace_bo) + offsetof(struct radv_trace_data, descriptor_sets);
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u_foreach_bit (i, descriptors_state->valid) {
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struct radv_descriptor_set *set = descriptors_state->sets[i];
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@ -27,8 +27,7 @@
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#include "radv_shader.h"
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#include "sid.h"
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#define TRACE_BO_SIZE 4096
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#define TMA_BO_SIZE 4096
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#define TMA_BO_SIZE 4096
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#define COLOR_RESET "\033[0m"
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#define COLOR_RED "\033[31m"
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@ -38,19 +37,6 @@
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#define RADV_DUMP_DIR "radv_dumps"
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/* Trace BO layout (offsets are 4 bytes):
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*
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* [0]: primary trace ID
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* [1]: secondary trace ID
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* [2-3]: 64-bit GFX ring pipeline pointer
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* [4-5]: 64-bit COMPUTE ring pipeline pointer
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* [6-7]: Vertex descriptors pointer
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* [8-9]: 64-bit Vertex prolog pointer
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* [10-11]: 64-bit descriptor set #0 pointer
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* ...
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* [72-73]: 64-bit descriptor set #31 pointer
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*/
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bool
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radv_init_trace(struct radv_device *device)
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{
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@ -58,7 +44,7 @@ radv_init_trace(struct radv_device *device)
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VkResult result;
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result = radv_bo_create(
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device, NULL, TRACE_BO_SIZE, 8, RADEON_DOMAIN_VRAM,
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device, NULL, sizeof(struct radv_trace_data), 8, RADEON_DOMAIN_VRAM,
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RADEON_FLAG_CPU_ACCESS | RADEON_FLAG_NO_INTERPROCESS_SHARING | RADEON_FLAG_ZERO_VRAM | RADEON_FLAG_VA_UNCACHED,
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RADV_BO_PRIORITY_UPLOAD_BUFFER, 0, true, &device->trace_bo);
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if (result != VK_SUCCESS)
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@ -68,8 +54,8 @@ radv_init_trace(struct radv_device *device)
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if (result != VK_SUCCESS)
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return false;
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device->trace_id_ptr = radv_buffer_map(ws, device->trace_bo);
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if (!device->trace_id_ptr)
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device->trace_data = radv_buffer_map(ws, device->trace_bo);
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if (!device->trace_data)
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return false;
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return true;
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@ -89,8 +75,8 @@ radv_finish_trace(struct radv_device *device)
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static void
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radv_dump_trace(const struct radv_device *device, struct radeon_cmdbuf *cs, FILE *f)
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{
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fprintf(f, "Trace ID: %x\n", *device->trace_id_ptr);
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device->ws->cs_dump(cs, f, (const int *)device->trace_id_ptr, 2, RADV_CS_DUMP_TYPE_IBS);
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fprintf(f, "Trace ID: %x\n", device->trace_data->primary_id);
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device->ws->cs_dump(cs, f, (const int *)&device->trace_data->primary_id, 2, RADV_CS_DUMP_TYPE_IBS);
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}
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static void
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@ -231,12 +217,11 @@ radv_dump_descriptor_set(const struct radv_device *device, const struct radv_des
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static void
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radv_dump_descriptors(struct radv_device *device, FILE *f)
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{
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uint64_t *ptr = (uint64_t *)device->trace_id_ptr;
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int i;
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fprintf(f, "Descriptors:\n");
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for (i = 0; i < MAX_SETS; i++) {
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struct radv_descriptor_set *set = *(struct radv_descriptor_set **)(ptr + i + 5);
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struct radv_descriptor_set *set = (struct radv_descriptor_set *)(uintptr_t)device->trace_data->descriptor_sets[i];
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radv_dump_descriptor_set(device, set, i, f);
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}
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@ -405,9 +390,8 @@ static void
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radv_dump_vertex_descriptors(const struct radv_device *device, const struct radv_graphics_pipeline *pipeline, FILE *f)
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{
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struct radv_shader *vs = radv_get_shader(pipeline->base.shaders, MESA_SHADER_VERTEX);
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uint64_t *ptr = (uint64_t *)device->trace_id_ptr;
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uint32_t count = util_bitcount(vs->info.vs.vb_desc_usage_mask);
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uint32_t *vb_ptr = *(uint32_t **)(ptr + 3);
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uint32_t *vb_ptr = (uint32_t *)(uintptr_t)device->trace_data->vertex_descriptors;
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if (!count)
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return;
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@ -427,17 +411,10 @@ radv_dump_vertex_descriptors(const struct radv_device *device, const struct radv
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}
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}
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static struct radv_shader_part *
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radv_get_saved_vs_prolog(const struct radv_device *device)
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{
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uint64_t *ptr = (uint64_t *)device->trace_id_ptr;
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return *(struct radv_shader_part **)(ptr + 4);
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}
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static void
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radv_dump_vs_prolog(const struct radv_device *device, const struct radv_graphics_pipeline *pipeline, FILE *f)
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{
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struct radv_shader_part *vs_prolog = radv_get_saved_vs_prolog(device);
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struct radv_shader_part *vs_prolog = (struct radv_shader_part *)(uintptr_t)device->trace_data->vertex_prolog;
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struct radv_shader *vs_shader = radv_get_shader(pipeline->base.shaders, MESA_SHADER_VERTEX);
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if (!vs_prolog || !vs_shader || !vs_shader->info.vs.has_prolog)
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@ -450,10 +427,10 @@ radv_dump_vs_prolog(const struct radv_device *device, const struct radv_graphics
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static struct radv_pipeline *
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radv_get_saved_pipeline(struct radv_device *device, enum amd_ip_type ring)
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{
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uint64_t *ptr = (uint64_t *)device->trace_id_ptr;
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int offset = ring == AMD_IP_GFX ? 1 : 2;
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return *(struct radv_pipeline **)(ptr + offset);
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if (ring == AMD_IP_GFX)
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return (struct radv_pipeline *)(uintptr_t)device->trace_data->gfx_ring_pipeline;
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else
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return (struct radv_pipeline *)(uintptr_t)device->trace_data->comp_ring_pipeline;
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}
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static void
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@ -107,4 +107,14 @@ radv_device_fault_detection_enabled(const struct radv_device *device)
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return instance->debug_flags & RADV_DEBUG_HANG;
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}
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struct radv_trace_data {
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uint32_t primary_id;
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uint32_t secondary_id;
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uint64_t gfx_ring_pipeline;
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uint64_t comp_ring_pipeline;
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uint64_t vertex_descriptors;
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uint64_t vertex_prolog;
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uint64_t descriptor_sets[MAX_SETS];
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};
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#endif /* RADV_DEBUG_H */
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@ -413,7 +413,7 @@ struct radv_device {
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struct radeon_winsys_bo *gfx_init;
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struct radeon_winsys_bo *trace_bo;
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uint32_t *trace_id_ptr;
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struct radv_trace_data *trace_data;
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/* Whether to keep shader debug info, for debugging. */
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bool keep_shader_info;
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@ -2197,7 +2197,7 @@ radv_queue_submit_normal(struct radv_queue *queue, struct vk_queue_submit *submi
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unsigned num_submitted_cs = 0;
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if (radv_device_fault_detection_enabled(device))
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*device->trace_id_ptr = 0;
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device->trace_data->primary_id = 0;
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struct radeon_cmdbuf *chainable = NULL;
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struct radeon_cmdbuf *chainable_ace = NULL;
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