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panfrost: Hook up RUN_FRAGMENT2 on the Gallium driver
Set the FBD size/alignment correctly and emit the fragment staging registers before issuing fragment commands. Also, move some temporary registers to non-conflicting ones. Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
This commit is contained in:
Marc Alcala Prieto
parent
dacccc3dec
commit
2b216a01f9
2 changed files with 134 additions and 16 deletions
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@ -1,5 +1,6 @@
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/*
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* Copyright (C) 2023 Collabora Ltd.
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* Copyright (C) 2026 Arm Ltd.
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* SPDX-License-Identifier: MIT
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*/
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@ -13,6 +14,7 @@
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#include "pan_cmdstream.h"
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#include "pan_context.h"
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#include "pan_csf.h"
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#include "pan_fb.h"
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#include "pan_fb_preload.h"
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#include "pan_job.h"
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#include "pan_trace.h"
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@ -75,6 +77,87 @@ csf_update_tiler_oom_ctx(struct cs_builder *b, uint64_t addr)
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(PAN_INCREMENTAL_RENDERING_##_pass##_PASS * sizeof(struct pan_ptr)) + \
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offsetof(struct pan_ptr, gpu))
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#if PAN_ARCH >= 14
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static void
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cs_emit_static_fragment_state(struct cs_builder *b,
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struct panfrost_batch *batch,
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const struct pan_fb_info *fb)
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{
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struct mali_frame_size_packed frame_size;
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pan_pack(&frame_size, FRAME_SIZE, cfg) {
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cfg.width = fb->width;
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cfg.height = fb->height;
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}
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cs_move32_to(b, cs_sr_reg32(b, FRAGMENT, FRAME_SIZE), frame_size.opaque[0]);
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cs_move64_to(b, cs_sr_reg64(b, FRAGMENT, SAMPLE_POSITION_ARRAY_POINTER),
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fb->sample_positions);
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struct mali_fragment_flags_1_packed flags1;
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pan_pack(&flags1, FRAGMENT_FLAGS_1, cfg) {
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/* The force_samples setting dictates the sample-count that is used
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* for rasterization, and works like D3D11's ForcedSampleCount
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* feature:
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*
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* - If force_samples == 0: Let nr_samples dictate sample count
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* - If force_samples == 1: force single-sampled rasterization
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* - If force_samples >= 1: force multi-sampled rasterization
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*
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* This can be used to read SYSTEM_VALUE_SAMPLE_MASK_IN from the
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* fragment shader, even when performing single-sampled rendering.
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*/
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if (fb->pls_enabled) {
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cfg.sample_count = 4;
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cfg.sample_pattern = pan_sample_pattern(1);
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} else if (!fb->force_samples) {
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cfg.sample_count = fb->nr_samples;
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cfg.sample_pattern = pan_sample_pattern(fb->nr_samples);
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} else if (fb->force_samples == 1) {
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cfg.sample_count = fb->nr_samples;
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cfg.sample_pattern = pan_sample_pattern(1);
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} else {
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cfg.sample_count = 1;
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cfg.sample_pattern = pan_sample_pattern(fb->force_samples);
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}
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cfg.effective_tile_size = fb->tile_size;
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cfg.point_sprite_coord_origin_max_y = fb->sprite_coord_origin;
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cfg.first_provoking_vertex = fb->first_provoking_vertex;
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cfg.render_target_count = MAX2(fb->rt_count, 1);
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cfg.color_buffer_allocation = fb->cbuf_allocation;
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}
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cs_move32_to(b, cs_sr_reg32(b, FRAGMENT, FLAGS_1), flags1.opaque[0]);
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/* Leave the remaining RUN_FRAGMENT2 staging registers as zero. */
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}
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static inline void
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cs_emit_layer_fragment_state(struct cs_builder *b, struct cs_index fbd_ptr)
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{
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/* Emit the dynamic fragment state. This state may change per-layer. */
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cs_load32_to(b, cs_sr_reg32(b, FRAGMENT, FLAGS_0), fbd_ptr,
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offsetof(struct pan_fbd_layer, flags0));
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cs_load32_to(b, cs_sr_reg32(b, FRAGMENT, FLAGS_2), fbd_ptr,
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offsetof(struct pan_fbd_layer, flags2));
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cs_load32_to(b, cs_sr_reg32(b, FRAGMENT, Z_CLEAR), fbd_ptr,
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offsetof(struct pan_fbd_layer, z_clear));
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cs_load64_to(b, cs_sr_reg64(b, FRAGMENT, TILER_DESCRIPTOR_POINTER), fbd_ptr,
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offsetof(struct pan_fbd_layer, tiler));
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cs_load64_to(b, cs_sr_reg64(b, FRAGMENT, RTD_POINTER), fbd_ptr,
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offsetof(struct pan_fbd_layer, rtd_pointer));
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cs_load64_to(b, cs_sr_reg64(b, FRAGMENT, DBD_POINTER), fbd_ptr,
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offsetof(struct pan_fbd_layer, dbd_pointer));
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cs_load64_to(b, cs_sr_reg64(b, FRAGMENT, FRAME_ARG), fbd_ptr,
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offsetof(struct pan_fbd_layer, frame_argument));
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cs_load64_to(b, cs_sr_reg64(b, FRAGMENT, FRAME_SHADER_DCD_POINTER), fbd_ptr,
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offsetof(struct pan_fbd_layer, dcd_pointer));
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cs_flush_loads(b);
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}
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#endif /* PAN_ARCH >= 14 */
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static int
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csf_oom_handler_init(struct panfrost_context *ctx)
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{
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@ -113,13 +196,14 @@ csf_oom_handler_init(struct panfrost_context *ctx)
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cs_function_def(&b, &handler, handler_ctx) {
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struct cs_index tiler_oom_ctx = cs_reg64(&b, TILER_OOM_CTX_REG);
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struct cs_index counter = cs_reg32(&b, 47);
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struct cs_index zero = cs_reg64(&b, 48);
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struct cs_index flush_id = cs_reg32(&b, 48);
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struct cs_index tiler_ctx = cs_reg64(&b, 50);
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struct cs_index completed_top = cs_reg64(&b, 52);
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struct cs_index completed_bottom = cs_reg64(&b, 54);
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struct cs_index completed_chunks = cs_reg_tuple(&b, 52, 4);
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struct cs_index counter = cs_reg32(&b, 31);
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struct cs_index zero = cs_reg64(&b, 56);
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struct cs_index flush_id = cs_reg32(&b, 58);
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struct cs_index tiler_ctx = cs_reg64(&b, 60);
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struct cs_index completed_top = cs_reg64(&b, 64);
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struct cs_index completed_bottom = cs_reg64(&b, 66);
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struct cs_index completed_chunks = cs_reg_tuple(&b, 64, 4);
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struct cs_index fbd_pointer = cs_sr_reg64(&b, FRAGMENT, FBD_POINTER);
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/* Ensure that the OTHER endpoint is valid */
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#if PAN_ARCH >= 11
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@ -133,12 +217,10 @@ csf_oom_handler_init(struct panfrost_context *ctx)
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cs_load32_to(&b, counter, tiler_oom_ctx, FIELD_OFFSET(counter));
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cs_wait_slot(&b, 0);
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cs_if(&b, MALI_CS_CONDITION_GREATER, counter) {
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cs_load64_to(&b, cs_sr_reg64(&b, FRAGMENT, FBD_POINTER), tiler_oom_ctx,
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FBD_OFFSET(MIDDLE));
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cs_load64_to(&b, fbd_pointer, tiler_oom_ctx, FBD_OFFSET(MIDDLE));
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}
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cs_else(&b) {
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cs_load64_to(&b, cs_sr_reg64(&b, FRAGMENT, FBD_POINTER), tiler_oom_ctx,
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FBD_OFFSET(FIRST));
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cs_load64_to(&b, fbd_pointer, tiler_oom_ctx, FBD_OFFSET(FIRST));
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}
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cs_load32_to(&b, cs_sr_reg32(&b, FRAGMENT, BBOX_MIN), tiler_oom_ctx,
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@ -147,11 +229,18 @@ csf_oom_handler_init(struct panfrost_context *ctx)
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FIELD_OFFSET(bbox_max));
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cs_move64_to(&b, cs_sr_reg64(&b, FRAGMENT, TEM_POINTER), 0);
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cs_move32_to(&b, cs_sr_reg32(&b, FRAGMENT, TEM_ROW_STRIDE), 0);
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#if PAN_ARCH >= 14
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cs_emit_layer_fragment_state(&b, fbd_pointer);
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#endif
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cs_wait_slot(&b, 0);
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/* Run the fragment job and wait */
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cs_select_endpoint_sb(&b, 3);
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#if PAN_ARCH >= 14
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cs_run_fragment2(&b, false, MALI_TILE_RENDER_ORDER_Z_ORDER);
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#else
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cs_run_fragment(&b, false, MALI_TILE_RENDER_ORDER_Z_ORDER);
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#endif
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cs_wait_slot(&b, 3);
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/* Increment counter */
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@ -218,6 +307,21 @@ GENX(csf_cleanup_batch)(struct panfrost_batch *batch)
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panfrost_pool_cleanup(&batch->csf.cs_chunk_pool);
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}
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#if PAN_ARCH >= 14
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static inline struct pan_ptr
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alloc_fbd(struct panfrost_batch *batch)
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{
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const struct pan_desc_alloc_info fbd_layer = {
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.size = ALIGN_POT(sizeof(struct pan_fbd_layer), 64),
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.align = alignof(struct pan_fbd_layer),
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.nelems = 1,
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};
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return pan_pool_alloc_desc_aggregate(
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&batch->pool.base, fbd_layer, PAN_DESC(ZS_CRC_EXTENSION),
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PAN_DESC_ARRAY(MAX2(batch->key.nr_cbufs, 1), RENDER_TARGET));
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}
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#else
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static inline struct pan_ptr
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alloc_fbd(struct panfrost_batch *batch)
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{
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@ -225,6 +329,7 @@ alloc_fbd(struct panfrost_batch *batch)
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&batch->pool.base, PAN_DESC(FRAMEBUFFER), PAN_DESC(ZS_CRC_EXTENSION),
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PAN_DESC_ARRAY(MAX2(batch->key.nr_cbufs, 1), RENDER_TARGET));
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}
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#endif /* PAN_ARCH >= 14 */
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int
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GENX(csf_init_batch)(struct panfrost_batch *batch)
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@ -854,15 +959,21 @@ GENX(csf_emit_fragment_job)(struct panfrost_batch *batch,
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cs_vt_end(b, cs_now());
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}
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struct cs_index fbd_pointer = cs_sr_reg64(b, FRAGMENT, FBD_POINTER);
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/* Set up the fragment job */
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cs_move64_to(b, cs_sr_reg64(b, FRAGMENT, FBD_POINTER),
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batch->framebuffer.gpu);
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cs_move64_to(b, fbd_pointer, batch->framebuffer.gpu);
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cs_move32_to(b, cs_sr_reg32(b, FRAGMENT, BBOX_MIN),
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(batch->miny << 16) | batch->minx);
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cs_move32_to(b, cs_sr_reg32(b, FRAGMENT, BBOX_MAX),
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((batch->maxy - 1) << 16) | (batch->maxx - 1));
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cs_move64_to(b, cs_sr_reg64(b, FRAGMENT, TEM_POINTER), 0);
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cs_move32_to(b, cs_sr_reg32(b, FRAGMENT, TEM_ROW_STRIDE), 0);
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#if PAN_ARCH >= 14
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cs_emit_static_fragment_state(b, batch, pfb);
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cs_emit_layer_fragment_state(b, fbd_pointer);
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#endif
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/* Use different framebuffer descriptor if incremental rendering was
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* triggered while tiling */
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@ -871,13 +982,19 @@ GENX(csf_emit_fragment_job)(struct panfrost_batch *batch,
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cs_load32_to(b, counter, cs_reg64(b, TILER_OOM_CTX_REG), 0);
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cs_wait_slot(b, 0);
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cs_if(b, MALI_CS_CONDITION_GREATER, counter) {
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cs_move64_to(b, cs_sr_reg64(b, FRAGMENT, FBD_POINTER),
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GET_FBD(oom_ctx, LAST).gpu);
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cs_move64_to(b, fbd_pointer, GET_FBD(oom_ctx, LAST).gpu);
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#if PAN_ARCH >= 14
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cs_emit_layer_fragment_state(b, fbd_pointer);
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#endif
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}
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}
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/* Run the fragment job and wait */
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#if PAN_ARCH >= 14
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cs_run_fragment2(b, false, MALI_TILE_RENDER_ORDER_Z_ORDER);
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#else
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cs_run_fragment(b, false, MALI_TILE_RENDER_ORDER_Z_ORDER);
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#endif
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cs_wait_slot(b, 2);
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/* Gather freed heap chunks and add them to the heap context free list
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@ -29,7 +29,8 @@ struct pan_csf_tiler_oom_ctx {
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/* Alternative framebuffer descriptors for incremental rendering */
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struct pan_ptr fbds[PAN_INCREMENTAL_RENDERING_PASS_COUNT];
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/* Bounding Box (Register 42 and 43) */
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/* Bounding Box (Register MALI_FRAGMENT_SR_BBOX_MIN and
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* MALI_FRAGMENT_SR_BBOX_MAX) */
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uint32_t bbox_min;
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uint32_t bbox_max;
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