From 2af44670eda0d406d5aff726812adff6eaab87ad Mon Sep 17 00:00:00 2001 From: Kenneth Graunke Date: Mon, 5 Jan 2026 16:07:00 -0800 Subject: [PATCH] brw: Implement load_urb_output_handle_intel for VS/GS stages Simply get the payload field. Reviewed-by: Alyssa Rosenzweig Part-of: --- src/intel/compiler/brw/brw_from_nir.cpp | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/src/intel/compiler/brw/brw_from_nir.cpp b/src/intel/compiler/brw/brw_from_nir.cpp index fcda6305ed9..5cf8d49dcbf 100644 --- a/src/intel/compiler/brw/brw_from_nir.cpp +++ b/src/intel/compiler/brw/brw_from_nir.cpp @@ -2688,6 +2688,10 @@ brw_from_nir_emit_vs_intrinsic(nir_to_brw_state &ntb, case nir_intrinsic_load_base_vertex: UNREACHABLE("should be lowered by nir_lower_system_values()"); + case nir_intrinsic_load_urb_output_handle_intel: + bld.MOV(retype(dest, BRW_TYPE_UD), s.vs_payload().urb_handles); + break; + case nir_intrinsic_load_input: { assert(instr->def.bit_size == 32); const brw_reg src = offset(brw_attr_reg(0, dest.type), bld, @@ -3133,6 +3137,10 @@ brw_from_nir_emit_gs_intrinsic(nir_to_brw_state &ntb, break; } + case nir_intrinsic_load_urb_output_handle_intel: + bld.MOV(retype(dest, BRW_TYPE_UD), s.gs_payload().urb_handles); + break; + case nir_intrinsic_emit_vertex_with_counter: emit_gs_vertex(ntb, instr->src[0], nir_intrinsic_stream_id(instr));