From 2aec2e8dba36168b1d3c84643a676777100e01ee Mon Sep 17 00:00:00 2001 From: David Rosca Date: Thu, 28 May 2026 16:06:45 +0200 Subject: [PATCH] ac/parse_ib: Add VCN decode queue parsing Reviewed-by: Benjamin Cheng Part-of: --- src/amd/common/ac_parse_ib.c | 97 ++++++++++++++++++++++++++++++++++-- 1 file changed, 92 insertions(+), 5 deletions(-) diff --git a/src/amd/common/ac_parse_ib.c b/src/amd/common/ac_parse_ib.c index fa67fd66671..ebe590191f4 100644 --- a/src/amd/common/ac_parse_ib.c +++ b/src/amd/common/ac_parse_ib.c @@ -1337,6 +1337,94 @@ static void print_vcn_msg_buffer_contents(FILE *f, struct ac_ib_parser *ib, uint } } +static void parse_vcn_dec_ib(FILE *f, struct ac_ib_parser *ib) +{ + uint32_t data0; + uint32_t data1; + uint32_t data2; + struct ac_vcn_dec_reg reg; + ac_vcn_dec_init_regs(®, ib->vcn_version); + + while (ib->cur_dw < ib->num_dw) { + const uint32_t dw = ac_ib_get(ib); + const uint32_t idx = RDECODE_PKT0_BASE_INDEX_G(dw) << 2; + if (dw == 0x81FF) { + fprintf(f, "NOP\n"); + } else if (idx == reg.data0) { + fprintf(f, "VCPU_DATA0\n"); + data0 = ac_ib_get(ib); + fprintf(f, "\n"); + } else if (idx == reg.data1) { + fprintf(f, "VCPU_DATA1\n"); + data1 = ac_ib_get(ib); + fprintf(f, "\n"); + } else if (idx == reg.data2) { + fprintf(f, "VCPU_DATA2\n"); + data2 = ac_ib_get(ib); + fprintf(f, "\n"); + } else if (idx == reg.cmd) { + fprintf(f, "VCPU_CMD\n"); + uint32_t cmd = ac_ib_get(ib) >> 1; + const char *name = NULL; + switch (cmd) { + case RDECODE_CMD_MSG_BUFFER: + name = "MSG BUFFER"; + break; + case RDECODE_CMD_DPB_BUFFER: + name = "DPB BUFFER"; + break; + case RDECODE_CMD_DECODING_TARGET_BUFFER: + name = "DECODING TARGET BUFFER"; + break; + case RDECODE_CMD_FEEDBACK_BUFFER: + name = "FEEDBACK BUFFER"; + break; + case RDECODE_CMD_PROB_TBL_BUFFER: + name = "PROB TBL BUFFER"; + break; + case RDECODE_CMD_SESSION_CONTEXT_BUFFER: + name = "SESSION CONTEXT BUFFER"; + break; + case RDECODE_CMD_BITSTREAM_BUFFER: + name = "BITSTREAM BUFFER"; + break; + case RDECODE_CMD_IT_SCALING_TABLE_BUFFER: + name = "IT SCALING BUFFER"; + break; + case RDECODE_CMD_CONTEXT_BUFFER: + name = "CONTEXT BUFFER"; + break; + case RDECODE_CMD_SUBSAMPLE: + name = "SUBSAMPLE BUFFER"; + break; + case RDECODE_CMD_WRITE_MEMORY: + name = "WRITE MEMORY"; + break; + default: + name = "UNKNOWN"; + break; + } + uint64_t va = ((uint64_t)data1 << 32) | data0; + fprintf(f, "%s%s%s VA=0x%"PRIx64, O_COLOR_GREEN, name, O_COLOR_RESET, va); + if (cmd == RDECODE_CMD_WRITE_MEMORY) + fprintf(f, " val=%u", data2); + fprintf(f, "\n"); + if (cmd == RDECODE_CMD_MSG_BUFFER) + print_vcn_msg_buffer_contents(f, ib, va); + } else if (idx == reg.cntl) { + fprintf(f, "VCPU_CNTL\n"); + uint32_t cntl = ac_ib_get(ib); + if (cntl == 1) + fprintf(f, "%sDECODE%s", O_COLOR_PURPLE, O_COLOR_RESET); + fprintf(f, "\n"); + } else { + fprintf(f, "UNKNOWN\n"); + ac_ib_get(ib); + fprintf(f, "\n"); + } + } +} + static uint64_t print_vcn_addr(FILE *f, struct ac_ib_parser *ib, bool high_first, const char *prefix_format, ...) { uint32_t high = ac_ib_get(ib); @@ -2424,11 +2512,10 @@ static void parse_vcn_ib(FILE *f, struct ac_ib_parser *ib) print_vcn_unrecognized_params(f, ib, start_dw, size); } } - } else { - if (ib->ip_type == AMD_IP_VCN_ENC) { - parse_vcn_enc_ib(f, ib, 0); - return; - } + } else if (ib->ip_type == AMD_IP_VCN_DEC) { + parse_vcn_dec_ib(f, ib); + } else if (ib->ip_type == AMD_IP_VCN_ENC) { + parse_vcn_enc_ib(f, ib, 0); } }