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intel/genxml: Add BCS/VD0 aux table base address register

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Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26409>
This commit is contained in:
Sagar Ghuge 2023-11-28 10:47:53 -08:00 • committed by Marge Bot
parent e46e9ee46c
commit 2aea09c8de
2 changed files with 9 additions and 0 deletions
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6
src/intel/genxml/gen12.xml
View file

@ -1483,4 +1483,10 @@
<field name="PSS Done" start="26" end="26" type="bool" />
<field name="AMFS Done" start="27" end="27" type="bool" />
</register>
<register name="VD0_AUX_TABLE_BASE_ADDR" length="2" num="0x4210">
<field name="Address" start="0" end="63" type="uint" />
</register>
<register name="VD0_CCS_AUX_INV" length="1" num="0x4218">
<field name="Aux Inv" start="0" end="0" type="bool" />
</register>
</genxml>

3
src/intel/genxml/gen125.xml
View file

@ -2117,6 +2117,9 @@
<field name="Destination Depth/Stencil Resource" start="498" end="498" type="bool" />
<field name="Destination Array Index" start="501" end="511" type="uint" />
</instruction>
<register name="BCS_AUX_TABLE_BASE_ADDR" length="2" num="0x4240">
<field name="Address" start="0" end="63" type="uint" />
</register>
<register name="BCS_CCS_AUX_INV" length="1" num="0x4248">
<field name="Aux Inv" start="0" end="0" type="bool" />
</register>