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brw: Allow SIMD32 math instructions on Xe2

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There's no restriction here AFAICT - only when HF types are involved.

fossil-db results on Lunar Lake:

   Totals:
   Instrs: 143665291 -> 142654109 (-0.70%)
   Cycle count: 22516049016 -> 22514172014 (-0.01%); split: -0.02%, +0.01%
   Max live registers: 49038116 -> 49017687 (-0.04%); split: -0.04%, +0.00%

   Totals from 117623 (21.07% of 558370) affected shaders:
   Instrs: 25098642 -> 24087460 (-4.03%)
   Cycle count: 1038884570 -> 1037007568 (-0.18%); split: -0.48%, +0.29%
   Max live registers: 12423219 -> 12402790 (-0.16%); split: -0.16%, +0.00%

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32471>
This commit is contained in:
Kenneth Graunke 2024-12-03 02:10:29 -08:00 • committed by Marge Bot
parent 815236b417
commit 2ade3ec2a9
1 changed files with 4 additions and 1 deletions
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5
src/intel/compiler/brw_fs_lower_simd_width.cpp
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@ -305,7 +305,10 @@ brw_fs_get_lowered_simd_width(const fs_visitor *shader, const fs_inst *inst)
if (is_half_float_src_dst(inst))
return devinfo->ver < 20 ? MIN2(8, inst->exec_size) :
MIN2(16, inst->exec_size);
return MIN2(16, inst->exec_size);
if (devinfo->ver < 20)
return MIN2(16, inst->exec_size);
return inst->exec_size;
}
case SHADER_OPCODE_POW: {