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shader_info: remove gl_subgroup_size enum

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Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37258>
This commit is contained in:
Georg Lehmann 2025-09-09 19:15:18 +02:00 • committed by Marge Bot
parent 89adefec64
commit 2ac5641473
14 changed files with 2 additions and 107 deletions
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2
src/compiler/glsl/gl_nir_linker.c
View file

@ -2703,8 +2703,6 @@ link_intrastage_shaders(void *mem_ctx,
gl_prog->nir->info.api_subgroup_size = ctx->screen->caps.shader_subgroup_size;
gl_prog->nir->info.max_subgroup_size = ctx->screen->caps.shader_subgroup_size;
}
gl_prog->nir->info.subgroup_size = KHR_shader_subgroup_basic_enable ?
SUBGROUP_SIZE_API_CONSTANT : SUBGROUP_SIZE_UNIFORM;
/* Move any instructions other than variable declarations or function
* declarations into main.

2
src/compiler/nir/nir_print.c
View file

@ -2725,8 +2725,6 @@ print_shader_info(const struct shader_info *info, FILE *fp)
print_nz_unsigned(fp, "ray queries", info->ray_queries);
fprintf(fp, "subgroup_size: %u\n", info->subgroup_size);
print_nz_unsigned(fp, "api_subgroup_size", info->api_subgroup_size);
fprintf(fp, "max_subgroup_size: %u\n", info->max_subgroup_size);
fprintf(fp, "min_subgroup_size: %u\n", info->min_subgroup_size);

38
src/compiler/shader_enums.h
View file

@ -1599,44 +1599,6 @@ enum cl_sampler_filter_mode {
#define MAT_BIT_FRONT_INDEXES (1<<MAT_ATTRIB_FRONT_INDEXES)
#define MAT_BIT_BACK_INDEXES (1<<MAT_ATTRIB_BACK_INDEXES)
/** An enum representing what kind of input gl_SubgroupSize is. */
enum ENUM_PACKED gl_subgroup_size
{
/** Actual subgroup size, whatever that happens to be */
SUBGROUP_SIZE_VARYING = 0,
/** Subgroup size must appear to be draw or dispatch-uniform
*
* This is the OpenGL behavior
*/
SUBGROUP_SIZE_UNIFORM,
/** Subgroup size must appear to be the API advertised constant
*
* This is the default Vulkan 1.1 behavior
*/
SUBGROUP_SIZE_API_CONSTANT,
/** Subgroup size must actually be the API advertised constant
*
* Not only must the subgroup size match the API advertised constant as
* with SUBGROUP_SIZE_API_CONSTANT but it must also be dispatched such that
* all the subgroups are full if there are enough invocations.
*/
SUBGROUP_SIZE_FULL_SUBGROUPS,
/* These enums are specifically chosen so that the value of the enum is
* also the subgroup size. If any new values are added, they must respect
* this invariant.
*/
SUBGROUP_SIZE_REQUIRE_4 = 4, /**< VK_EXT_subgroup_size_control */
SUBGROUP_SIZE_REQUIRE_8 = 8, /**< VK_EXT_subgroup_size_control */
SUBGROUP_SIZE_REQUIRE_16 = 16, /**< VK_EXT_subgroup_size_control */
SUBGROUP_SIZE_REQUIRE_32 = 32, /**< VK_EXT_subgroup_size_control */
SUBGROUP_SIZE_REQUIRE_64 = 64, /**< VK_EXT_subgroup_size_control */
SUBGROUP_SIZE_REQUIRE_128 = 128, /**< VK_EXT_subgroup_size_control */
};
/* Ordered from narrower to wider scope. */
typedef enum {
SCOPE_NONE,

2
src/compiler/shader_info.h
View file

@ -174,8 +174,6 @@ typedef struct shader_info {
uint8_t num_subgroups;
enum gl_subgroup_size subgroup_size; /* To be removed. */
/* The value reported in gl_SubgroupSize.
* Must be a power of two between 1 and 128
* or 0 if still unknown.

3
src/compiler/spirv/nir_spirv.h
View file

@ -68,9 +68,6 @@ struct spirv_to_nir_options {
*/
uint32_t float_controls_execution_mode;
/* Initial subgroup size. This may be overwritten for CL kernels */
enum gl_subgroup_size subgroup_size;
/* True if RelaxedPrecision-decorated ALU result values should be performed
* with 16-bit math.
*/

8
src/compiler/spirv/spirv_to_nir.c
View file

@ -5657,8 +5657,7 @@ vtn_handle_execution_mode(struct vtn_builder *b, struct vtn_value *entry_point,
case SpvExecutionModeSubgroupSize:
vtn_assert(b->shader->info.stage == MESA_SHADER_KERNEL);
vtn_assert(b->shader->info.subgroup_size == SUBGROUP_SIZE_VARYING);
b->shader->info.subgroup_size = mode->operands[0];
vtn_assert(!b->shader->info.api_subgroup_size);
b->shader->info.api_subgroup_size = mode->operands[0];
b->shader->info.max_subgroup_size = mode->operands[0];
b->shader->info.min_subgroup_size = mode->operands[0];
@ -7218,7 +7217,6 @@ spirv_to_nir(const uint32_t *words, size_t word_count,
vtn_dump_shader(b, dump_path, "spirv");
b->shader = nir_shader_create(b, stage, nir_options);
b->shader->info.subgroup_size = options->subgroup_size;
b->shader->info.float_controls_execution_mode = options->float_controls_execution_mode;
b->shader->info.cs.shader_index = options->shader_index;
b->shader->has_debug_info = options->debug_info;
@ -7231,10 +7229,6 @@ spirv_to_nir(const uint32_t *words, size_t word_count,
words = vtn_foreach_instruction(b, words, word_end,
vtn_handle_preamble_instruction);
if (b->shader->info.subgroup_size == SUBGROUP_SIZE_UNIFORM &&
b->enabled_capabilities.GroupNonUniform)
b->shader->info.subgroup_size = SUBGROUP_SIZE_API_CONSTANT;
if (b->enabled_capabilities.GroupNonUniform && options->group_non_uniform_subgroup_size) {
b->shader->info.api_subgroup_size = options->group_non_uniform_subgroup_size;
b->shader->info.max_subgroup_size = options->group_non_uniform_subgroup_size;

2
src/gallium/auxiliary/nir/tgsi_to_nir.c
View file

@ -2269,8 +2269,6 @@ ttn_compile_init(const void *tgsi_tokens,
c->cap_face_is_sysval = true;
}
s->info.subgroup_size = SUBGROUP_SIZE_UNIFORM;
if (s->info.stage == MESA_SHADER_FRAGMENT)
s->info.fs.untyped_color_outputs = true;

1
src/mesa/main/ff_fragment_shader.c
View file

@ -944,7 +944,6 @@ create_new_program(struct gl_context *ctx, struct state_key *key,
nir_shader *s = b.shader;
s->info.separate_shader = true;
s->info.subgroup_size = SUBGROUP_SIZE_UNIFORM;
s->info.api_subgroup_size_draw_uniform = true;
s->info.io_lowered = true;

1
src/mesa/main/glspirv.c
View file

@ -266,7 +266,6 @@ _mesa_spirv_to_nir(struct gl_context *ctx,
struct spirv_to_nir_options spirv_options = {
.environment = NIR_SPIRV_OPENGL,
.capabilities = &spirv_caps,
.subgroup_size = SUBGROUP_SIZE_UNIFORM,
.ubo_addr_format = nir_address_format_32bit_index_offset,
.ssbo_addr_format = nir_address_format_32bit_index_offset,

2
src/vulkan/runtime/vk_nir.c
View file

@ -119,7 +119,6 @@ nir_shader *
vk_spirv_to_nir(struct vk_device *device,
const uint32_t *spirv_data, size_t spirv_size_B,
mesa_shader_stage stage, const char *entrypoint_name,
enum gl_subgroup_size subgroup_size,
const VkSpecializationInfo *spec_info,
const struct spirv_to_nir_options *spirv_options,
const struct nir_shader_compiler_options *nir_options,
@ -136,7 +135,6 @@ vk_spirv_to_nir(struct vk_device *device,
spirv_options_local.capabilities = &spirv_caps;
spirv_options_local.debug.func = spirv_nir_debug;
spirv_options_local.debug.private_data = (void *)device;
spirv_options_local.subgroup_size = subgroup_size;
uint32_t num_spec_entries = 0;
struct nir_spirv_specialization *spec_entries =

1
src/vulkan/runtime/vk_nir.h
View file

@ -44,7 +44,6 @@ nir_shader *
vk_spirv_to_nir(struct vk_device *device,
const uint32_t *spirv_data, size_t spirv_size_B,
mesa_shader_stage stage, const char *entrypoint_name,
enum gl_subgroup_size subgroup_size,
const VkSpecializationInfo *spec_info,
const struct spirv_to_nir_options *spirv_options,
const struct nir_shader_compiler_options *nir_options,

33
src/vulkan/runtime/vk_pipeline.c
View file

@ -102,31 +102,6 @@ get_required_subgroup_size(const void *info_pNext)
return rss_info != NULL ? rss_info->requiredSubgroupSize : 0;
}
enum gl_subgroup_size
vk_get_subgroup_size(uint32_t spirv_version,
mesa_shader_stage stage,
const void *info_pNext,
bool allow_varying,
bool require_full)
{
uint32_t req_subgroup_size = get_required_subgroup_size(info_pNext);
if (req_subgroup_size > 0) {
assert(util_is_power_of_two_nonzero(req_subgroup_size));
assert(req_subgroup_size >= 4 && req_subgroup_size <= 128);
return req_subgroup_size;
} else if (allow_varying || spirv_version >= 0x10600) {
/* Starting with SPIR-V 1.6, varying subgroup size the default */
return SUBGROUP_SIZE_VARYING;
} else if (require_full) {
assert(stage == MESA_SHADER_COMPUTE ||
stage == MESA_SHADER_MESH ||
stage == MESA_SHADER_TASK);
return SUBGROUP_SIZE_FULL_SUBGROUPS;
} else {
return SUBGROUP_SIZE_API_CONSTANT;
}
}
void
vk_set_subgroup_size(struct vk_device *device,
nir_shader *shader,
@ -211,14 +186,8 @@ vk_pipeline_shader_stage_to_nir(struct vk_device *device,
spirv_size = minfo->codeSize;
}
enum gl_subgroup_size subgroup_size = vk_get_subgroup_size(
vk_spirv_version(spirv_data, spirv_size),
stage, info->pNext,
info->flags & VK_PIPELINE_SHADER_STAGE_CREATE_ALLOW_VARYING_SUBGROUP_SIZE_BIT,
info->flags & VK_PIPELINE_SHADER_STAGE_CREATE_REQUIRE_FULL_SUBGROUPS_BIT);
nir_shader *nir = vk_spirv_to_nir(device, spirv_data, spirv_size, stage,
info->pName, subgroup_size,
info->pName,
info->pSpecializationInfo,
spirv_options, nir_options,
false /* internal */,

7
src/vulkan/runtime/vk_pipeline.h
View file

@ -54,13 +54,6 @@ vk_pipeline_shader_stage_to_nir(struct vk_device *device,
const struct nir_shader_compiler_options *nir_options,
void *mem_ctx, struct nir_shader **nir_out);
enum gl_subgroup_size
vk_get_subgroup_size(uint32_t spirv_version,
mesa_shader_stage stage,
const void *info_pNext,
bool allow_varying,
bool require_full);
typedef struct nir_shader nir_shader;
void

7
src/vulkan/runtime/vk_shader.c
View file

@ -164,16 +164,9 @@ vk_shader_to_nir(struct vk_device *device,
struct spirv_to_nir_options spirv_options =
ops->get_spirv_options(device->physical, stage, rs);
enum gl_subgroup_size subgroup_size = vk_get_subgroup_size(
vk_spirv_version(info->pCode, info->codeSize),
stage, info->pNext,
info->flags & VK_SHADER_CREATE_ALLOW_VARYING_SUBGROUP_SIZE_BIT_EXT,
info->flags &VK_SHADER_CREATE_REQUIRE_FULL_SUBGROUPS_BIT_EXT);
nir_shader *nir = vk_spirv_to_nir(device,
info->pCode, info->codeSize,
stage, info->pName,
subgroup_size,
info->pSpecializationInfo,
&spirv_options, nir_options,
false /* internal */, NULL);