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Merge Mesa 3.4 test for operating system support for SSE.
This commit is contained in:
Gareth Hughes
parent
fac5fd258c
commit
2ac44e2509
2 changed files with 233 additions and 8 deletions
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@ -1,4 +1,4 @@
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/* $Id: common_x86.c,v 1.7 2000/10/23 00:16:28 gareth Exp $ */
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/* $Id: common_x86.c,v 1.8 2000/12/06 14:41:47 gareth Exp $ */
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/*
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* Mesa 3-D graphics library
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@ -36,7 +36,11 @@
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#include <stdlib.h>
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#include <stdio.h>
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#if defined(USE_KATMAI_ASM) && defined(__linux__) && defined(_POSIX_SOURCE)
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#include <signal.h>
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#endif
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#include "context.h"
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#include "common_x86_asm.h"
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@ -49,11 +53,176 @@ extern int gl_identify_x86_cpu_features( void );
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static void message( const char *msg )
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{
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GLboolean debug;
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#ifdef DEBUG
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debug = GL_TRUE;
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#else
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if ( getenv( "MESA_DEBUG" ) ) {
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fprintf( stderr, "%s\n", msg );
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debug = GL_TRUE;
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} else {
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debug = GL_FALSE;
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}
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#endif
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if ( debug ) {
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fprintf( stderr, "%s", msg );
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}
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}
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#if defined(USE_KATMAI_ASM)
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/*
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* We must verify that the Streaming SIMD Extensions are truly supported
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* on this processor before we go ahead and hook out the optimized code.
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* Unfortunately, the CPUID bit isn't enough, as the OS must set the
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* OSFXSR bit in CR4 if it supports the extended FPU save and restore
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* required to use SSE. Unfortunately, we can't just go ahead and read
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* this register, as only the kernel can do that. Similarly, we must
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* verify that the OSXMMEXCPT bit in CR4 has been set by the OS,
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* signifying that it supports unmasked SIMD FPU exceptions. If we take
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* an unmasked exception and the OS doesn't correctly support them, the
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* best we'll get is a SIGILL and the worst we'll get is an infinite
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* loop in the signal delivery from the kernel as we can't interact with
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* the SIMD FPU state to clear the exception bits. Either way, this is
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* not good.
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*/
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extern void gl_test_os_katmai_support( void );
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extern void gl_test_os_katmai_exception_support( void );
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#if defined(__linux__) && defined(_POSIX_SOURCE)
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static void sigill_handler( int signal, struct sigcontext sc )
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{
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message( "SIGILL, " );
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/* Both the "xorps %%xmm0,%%xmm0" and "divps %xmm0,%%xmm1"
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* instructions are 3 bytes long. We must increment the instruction
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* pointer manually to avoid repeated execution of the offending
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* instruction.
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*
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* If the SIGILL is caused by a divide-by-zero when unmasked
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* exceptions aren't supported, the SIMD FPU status and control
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* word will be restored at the end of the test, so we don't need
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* to worry about doing it here. Besides, we may not be able to...
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*/
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sc.eip += 3;
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gl_x86_cpu_features &= ~(X86_FEATURE_XMM);
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}
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static void sigfpe_handler( int signal, struct sigcontext sc )
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{
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message( "SIGFPE, " );
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if ( sc.fpstate->magic != 0xffff ) {
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/* Our signal context has the extended FPU state, so reset the
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* divide-by-zero exception mask and clear the divide-by-zero
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* exception bit.
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*/
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sc.fpstate->mxcsr |= 0x00000200;
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sc.fpstate->mxcsr &= 0xfffffffb;
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} else {
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/* If we ever get here, we're completely hosed.
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*/
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message( "\n\n" );
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gl_problem( NULL, "SSE enabling test failed badly!" );
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}
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}
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#endif /* __linux__ && _POSIX_SOURCE */
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/* If we're running on a processor that can do SSE, let's see if we
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* are allowed to or not. This will catch 2.4.0 or later kernels that
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* haven't been configured for a Pentium III but are running on one,
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* and RedHat patched 2.2 kernels that have broken exception handling
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* support for user space apps that do SSE.
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*
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* GH: Isn't this just awful?
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*/
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static void check_os_katmai_support( void )
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{
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#if defined(__linux__)
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#if defined(_POSIX_SOURCE)
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struct sigaction saved_sigill;
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struct sigaction saved_sigfpe;
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/* Save the original signal handlers.
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*/
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sigaction( SIGILL, NULL, &saved_sigill );
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sigaction( SIGFPE, NULL, &saved_sigfpe );
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signal( SIGILL, (void (*)(int))sigill_handler );
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signal( SIGFPE, (void (*)(int))sigfpe_handler );
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/* Emulate test for OSFXSR in CR4. The OS will set this bit if it
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* supports the extended FPU save and restore required for SSE. If
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* we execute an SSE instruction on a PIII and get a SIGILL, the OS
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* doesn't support Streaming SIMD Exceptions, even if the processor
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* does.
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*/
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if ( cpu_has_xmm ) {
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message( "Testing OS support for SSE... " );
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gl_test_os_katmai_support();
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if ( cpu_has_xmm ) {
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message( "yes.\n" );
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} else {
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message( "no!\n" );
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}
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}
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/* Emulate test for OSXMMEXCPT in CR4. The OS will set this bit if
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* it supports unmasked SIMD FPU exceptions. If we unmask the
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* exceptions, do a SIMD divide-by-zero and get a SIGILL, the OS
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* doesn't support unmasked SIMD FPU exceptions. If we get a SIGFPE
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* as expected, we're okay but we need to clean up after it.
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*
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* Are we being too stringent in our requirement that the OS support
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* unmasked exceptions? Certain RedHat 2.2 kernels enable SSE by
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* setting CR4.OSFXSR but don't support unmasked exceptions. Win98
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* doesn't even support them. We at least know the user-space SSE
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* support is good in kernels that do support unmasked exceptions,
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* and therefore to be safe I'm going to leave this test in here.
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*/
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if ( cpu_has_xmm ) {
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message( "Testing OS support for SSE unmasked exceptions... " );
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gl_test_os_katmai_exception_support();
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if ( cpu_has_xmm ) {
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message( "yes.\n" );
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} else {
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message( "no!\n" );
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}
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}
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/* Restore the original signal handlers.
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*/
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sigaction( SIGILL, &saved_sigill, NULL );
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sigaction( SIGFPE, &saved_sigfpe, NULL );
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/* If we've gotten to here and the XMM CPUID bit is still set, we're
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* safe to go ahead and hook out the SSE code throughout Mesa.
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*/
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if ( cpu_has_xmm ) {
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message( "Tests of OS support for SSE passed.\n" );
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} else {
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message( "Tests of OS support for SSE failed!\n" );
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}
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#else
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/* We can't use POSIX signal handling to test the availability of
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* SSE, so we disable it by default.
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*/
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message( "Cannot test OS support for SSE, disabling to be safe.\n" );
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gl_x86_cpu_features &= ~(X86_FEATURE_XMM);
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#endif /* _POSIX_SOURCE */
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#else
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/* Do nothing on non-Linux platforms for now.
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*/
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message( "Not testing OS support for SSE, leaving enabled.\n" );
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#endif /* __linux__ */
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}
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#endif /* USE_KATMAI_ASM */
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void gl_init_all_x86_transform_asm( void )
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{
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@ -71,7 +240,7 @@ void gl_init_all_x86_transform_asm( void )
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#ifdef USE_MMX_ASM
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if ( cpu_has_mmx ) {
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if ( getenv( "MESA_NO_MMX" ) == 0 ) {
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message( "MMX cpu detected." );
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message( "MMX cpu detected.\n" );
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} else {
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gl_x86_cpu_features &= ~(X86_FEATURE_MMX);
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}
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@ -81,7 +250,7 @@ void gl_init_all_x86_transform_asm( void )
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#ifdef USE_3DNOW_ASM
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if ( cpu_has_3dnow ) {
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if ( getenv( "MESA_NO_3DNOW" ) == 0 ) {
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message( "3Dnow cpu detected." );
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message( "3DNow! cpu detected.\n" );
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gl_init_3dnow_transform_asm();
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} else {
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gl_x86_cpu_features &= ~(X86_FEATURE_3DNOW);
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@ -90,9 +259,12 @@ void gl_init_all_x86_transform_asm( void )
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#endif
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#ifdef USE_KATMAI_ASM
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if ( cpu_has_xmm ) {
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check_os_katmai_support();
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}
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if ( cpu_has_xmm ) {
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if ( getenv( "MESA_NO_KATMAI" ) == 0 ) {
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message( "Katmai cpu detected." );
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message( "Katmai cpu detected.\n" );
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gl_init_katmai_transform_asm();
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} else {
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gl_x86_cpu_features &= ~(X86_FEATURE_XMM);
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@ -1,4 +1,4 @@
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/* $Id: common_x86_asm.S,v 1.2 2000/10/23 00:16:28 gareth Exp $ */
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/* $Id: common_x86_asm.S,v 1.3 2000/12/06 14:41:47 gareth Exp $ */
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/*
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* Mesa 3-D graphics library
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@ -55,8 +55,11 @@
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/* We might want to print out some useful messages.
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*/
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LLBL( found_intel ): STRING( "Genuine Intel processor found\n\0" )
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LLBL( found_amd ): STRING( "Authentic AMD processor found\n\0" )
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GLNAME( found_intel ): STRING( "Genuine Intel processor found\n\0" )
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GLNAME( found_amd ): STRING( "Authentic AMD processor found\n\0" )
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GLNAME( katmai_test_dummy ):
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D_LONG 0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000
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SEG_TEXT
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@ -150,3 +153,53 @@ LLBL ( cpuid_done ):
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POP_L ( EBX )
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RET
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/* Execute an SSE instruction to see if the operating system correctly
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* supports SSE. A signal handler for SIGILL should have been set
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* before calling this function, otherwise this could kill the client
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* application.
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*/
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ALIGNTEXT4
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GLOBL GLNAME( gl_test_os_katmai_support )
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GLNAME( gl_test_os_katmai_support ):
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XORPS ( XMM0, XMM0 )
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RET
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/* Perform an SSE divide-by-zero to see if the operating system
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* correctly supports unmasked SIMD FPU exceptions. Signal handlers for
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* SIGILL and SIGFPE should have been set before calling this function,
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* otherwise this could kill the client application.
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*/
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ALIGNTEXT4
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GLOBL GLNAME( gl_test_os_katmai_exception_support )
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GLNAME( gl_test_os_katmai_exception_support ):
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PUSH_L ( EBP )
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MOV_L ( ESP, EBP )
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SUB_L ( CONST( 8 ), ESP )
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/* Save the original MXCSR register value.
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*/
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STMXCSR ( REGOFF( -4, EBP ) )
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/* Unmask the divide-by-zero exception and perform one.
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*/
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STMXCSR ( REGOFF( -8, EBP ) )
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AND_L ( CONST( 0xfffffdff ), REGOFF( -8, EBP ) )
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LDMXCSR ( REGOFF( -8, EBP ) )
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XORPS ( XMM0, XMM0 )
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MOVUPS ( GLNAME( katmai_test_dummy ), XMM1 )
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DIVPS ( XMM0, XMM1 )
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/* Restore the original MXCSR register value.
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*/
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LDMXCSR ( REGOFF( -4, EBP ) )
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LEAVE
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RET
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