diff --git a/src/gallium/drivers/iris/iris_state.c b/src/gallium/drivers/iris/iris_state.c
index 41dcd03b6cb..df14d0495a3 100644
--- a/src/gallium/drivers/iris/iris_state.c
+++ b/src/gallium/drivers/iris/iris_state.c
@@ -1369,6 +1369,13 @@ iris_init_render_context(struct iris_batch *batch)
};
#endif
+#if GFX_VER >= 20
+ iris_emit_cmd(batch, GENX(3DSTATE_3D_MODE), p) {
+ p.DX10OGLBorderModeforYCRCB = true;
+ p.DX10OGLBorderModeforYCRCBMask = true;
+ }
+#endif
+
upload_pixel_hashing_tables(batch);
/* 3DSTATE_DRAWING_RECTANGLE is non-pipelined, so we want to avoid
diff --git a/src/intel/genxml/gen20.xml b/src/intel/genxml/gen20.xml
index eece94dc486..922e888dec9 100644
--- a/src/intel/genxml/gen20.xml
+++ b/src/intel/genxml/gen20.xml
@@ -320,6 +320,29 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/src/intel/vulkan/genX_init_state.c b/src/intel/vulkan/genX_init_state.c
index 9fa3bc2dc0d..2abe70ce8f8 100644
--- a/src/intel/vulkan/genX_init_state.c
+++ b/src/intel/vulkan/genX_init_state.c
@@ -628,6 +628,13 @@ init_render_queue_state(struct anv_queue *queue, bool is_companion_rcs_batch)
genX(emit_pipeline_select)(batch, _3D, device);
#endif
+#if GFX_VER >= 20
+ anv_batch_emit(batch, GENX(3DSTATE_3D_MODE), p) {
+ p.DX10OGLBorderModeforYCRCB = true;
+ p.DX10OGLBorderModeforYCRCBMask = true;
+ }
+#endif
+
anv_batch_emit(batch, GENX(MI_BATCH_BUFFER_END), bbe);
result = batch->status;