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intel/brw: Make component_size() consistent between VGRF and FIXED_GRF

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Change so the size rounds up to the next multiple of the horizontal stride like
is done for VGRF.  This was causing an inconsistency in regs_read() -- The original
component_size() calculation for FIXED_GRF excluded any padding at the end but it was
still being discounted by regs_read().

Suggested by Curro.

Fixes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11069
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29736>
This commit is contained in:
Caio Oliveira 2024-06-14 13:07:15 -07:00 • committed by Marge Bot
parent 8fb70f0746
commit 2a9f4618c5
2 changed files with 6 additions and 3 deletions
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5
src/intel/compiler/brw_fs.cpp
View file

@ -611,7 +611,10 @@ fs_reg::component_size(unsigned width) const
const unsigned vs = vstride ? 1 << (vstride - 1) : 0;
const unsigned hs = hstride ? 1 << (hstride - 1) : 0;
assert(w > 0);
return ((MAX2(1, h) - 1) * vs + (w - 1) * hs + 1) * brw_type_size_bytes(type);
/* Note this rounds up to next horizontal stride to be consistent with
* the VGRF case below.
*/
return ((MAX2(1, h) - 1) * vs + MAX2(w * hs, 1)) * brw_type_size_bytes(type);
} else {
return MAX2(width * stride, 1) * brw_type_size_bytes(type);
}

4
src/intel/compiler/test_fs_scoreboard.cpp
View file

@ -892,7 +892,7 @@ TEST_F(scoreboard_test, gfx125_RaR_over_different_pipes)
EXPECT_EQ(instruction(block0, 2)->sched, tgl_swsb_regdist(1));
}
TEST_F(scoreboard_test, DISABLED_gitlab_issue_from_mr_29723)
TEST_F(scoreboard_test, gitlab_issue_from_mr_29723)
{
brw_init_isa_info(&compiler->isa, devinfo);
@ -916,7 +916,7 @@ TEST_F(scoreboard_test, DISABLED_gitlab_issue_from_mr_29723)
EXPECT_EQ(instruction(block0, 1)->sched, tgl_swsb_regdist(1));
}
TEST_F(scoreboard_test, DISABLED_gitlab_issue_11069)
TEST_F(scoreboard_test, gitlab_issue_11069)
{
brw_init_isa_info(&compiler->isa, devinfo);