From 2a9b466299dbf669f025c8eee0988b6893a3564c Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Wed, 21 Feb 2024 13:52:59 +0100 Subject: [PATCH] radv: add a new user SGPR for NGG shaders compiled separately with ESO The esgs ring size and the scratch lds base can't be known at compile time when NGG shaders are merged separately. Signed-off-by: Samuel Pitoiset Part-of: --- src/amd/vulkan/radv_shader.h | 18 ++++++++++++------ src/amd/vulkan/radv_shader_args.c | 2 ++ src/amd/vulkan/radv_shader_args.h | 1 + 3 files changed, 15 insertions(+), 6 deletions(-) diff --git a/src/amd/vulkan/radv_shader.h b/src/amd/vulkan/radv_shader.h index feff3f3f4b5..edb39a914bc 100644 --- a/src/amd/vulkan/radv_shader.h +++ b/src/amd/vulkan/radv_shader.h @@ -211,12 +211,13 @@ enum radv_ud_index { AC_UD_NGG_PROVOKING_VTX = 7, AC_UD_NGG_CULLING_SETTINGS = 8, AC_UD_NGG_VIEWPORT = 9, - AC_UD_VGT_ESGS_RING_ITEMSIZE = 10, - AC_UD_FORCE_VRS_RATES = 11, - AC_UD_TASK_RING_ENTRY = 12, - AC_UD_NUM_VERTS_PER_PRIM = 13, - AC_UD_NEXT_STAGE_PC = 14, - AC_UD_SHADER_START = 15, + AC_UD_NGG_LDS_LAYOUT = 10, + AC_UD_VGT_ESGS_RING_ITEMSIZE = 11, + AC_UD_FORCE_VRS_RATES = 12, + AC_UD_TASK_RING_ENTRY = 13, + AC_UD_NUM_VERTS_PER_PRIM = 14, + AC_UD_NEXT_STAGE_PC = 15, + AC_UD_SHADER_START = 16, AC_UD_VS_VERTEX_BUFFERS = AC_UD_SHADER_START, AC_UD_VS_BASE_VERTEX_START_INSTANCE, AC_UD_VS_PROLOG_INPUTS, @@ -261,6 +262,11 @@ enum radv_ud_index { #define TES_STATE_NUM_TCS_OUTPUTS__SHIFT 16 #define TES_STATE_NUM_TCS_OUTPUTS__MASK 0xff +#define NGG_LDS_LAYOUT_GS_OUT_VERTEX_BASE__SHIFT 0 +#define NGG_LDS_LAYOUT_GS_OUT_VERTEX_BASE__MASK 0xffff +#define NGG_LDS_LAYOUT_SCRATCH_BASE__SHIFT 16 +#define NGG_LDS_LAYOUT_SCRATCH_BASE__MASK 0xffff + #define PS_STATE_NUM_SAMPLES__SHIFT 0 #define PS_STATE_NUM_SAMPLES__MASK 0xf #define PS_STATE_LINE_RAST_MODE__SHIFT 4 diff --git a/src/amd/vulkan/radv_shader_args.c b/src/amd/vulkan/radv_shader_args.c index 5243c6cabcc..73be9fc6057 100644 --- a/src/amd/vulkan/radv_shader_args.c +++ b/src/amd/vulkan/radv_shader_args.c @@ -464,6 +464,7 @@ declare_unmerged_vs_tes_gs_args(const enum amd_gfx_level gfx_level, const struct add_ud_arg(args, 1, AC_ARG_INT, &args->ngg_provoking_vtx, AC_UD_NGG_PROVOKING_VTX); } add_ud_arg(args, 1, AC_ARG_INT, &args->vgt_esgs_ring_itemsize, AC_UD_VGT_ESGS_RING_ITEMSIZE); + add_ud_arg(args, 1, AC_ARG_INT, &args->ngg_lds_layout, AC_UD_NGG_LDS_LAYOUT); add_ud_arg(args, 1, AC_ARG_INT, &args->next_stage_pc, AC_UD_NEXT_STAGE_PC); /* VGPRs (GS) */ @@ -497,6 +498,7 @@ declare_unmerged_vs_tes_gs_args(const enum amd_gfx_level gfx_level, const struct if (info->is_ngg) ac_add_preserved(&args->ac, &args->ngg_provoking_vtx); ac_add_preserved(&args->ac, &args->vgt_esgs_ring_itemsize); + ac_add_preserved(&args->ac, &args->ngg_lds_layout); /* Preserved VGPRs */ ac_add_preserved(&args->ac, &args->ac.gs_vtx_offset[0]); diff --git a/src/amd/vulkan/radv_shader_args.h b/src/amd/vulkan/radv_shader_args.h index 59a7c844cd3..f11c862cec7 100644 --- a/src/amd/vulkan/radv_shader_args.h +++ b/src/amd/vulkan/radv_shader_args.h @@ -47,6 +47,7 @@ struct radv_shader_args { /* NGG */ struct ac_arg ngg_provoking_vtx; + struct ac_arg ngg_lds_layout; /* NGG GS */ struct ac_arg ngg_culling_settings;