diff --git a/src/intel/decoder/intel_batch_decoder.c b/src/intel/decoder/intel_batch_decoder.c
index 1296939dbc4..07e9bcb7b98 100644
--- a/src/intel/decoder/intel_batch_decoder.c
+++ b/src/intel/decoder/intel_batch_decoder.c
@@ -1231,6 +1231,27 @@ decode_load_register_imm(struct intel_batch_decode_ctx *ctx, const uint32_t *p)
    }
 }
 
+static void
+decode_store_data_imm(struct intel_batch_decode_ctx *ctx, const uint32_t *p)
+{
+   /* Record a _potential_ shader hash. (We won't know if the data is a hash
+    * from a dummy MI_STORE_DATA_IMM or a real case of the same command until
+    * the next command gets parsed.)
+    *
+    * Since shader hash injection is supported, a hash was 32 bit and then
+    * is extended to 64 bit. There is a chance that a decoder supporting 64
+    * bit hash is used to parse an older dump generated with 32 bit hash. We
+    * have to look into the dword length field (bits 9:0 of BG 0) to
+    * determine the width of the hash.
+    *
+    * So far, dword 3 and 4 of MI_STORE_DATA_IMM are defined same way among
+    * all GFX generations, so we simply use the hard-coded indexes to get
+    * their values.
+    */
+   uint64_t hash_hi = (*p & 0x3ff) == 2 ? 0 : p[4];
+   ctx->shader_hash.hash = (hash_hi << 32) + p[3];
+}
+
 static void
 disasm_program_from_group(struct intel_batch_decode_ctx *ctx,
                           struct intel_group *strct, const void *map,
@@ -1515,6 +1536,7 @@ struct custom_decoder custom_decoders[] = {
    { "3DSTATE_SCISSOR_STATE_POINTERS", decode_3dstate_scissor_state_pointers },
    { "3DSTATE_SLICE_TABLE_STATE_POINTERS", decode_3dstate_slice_table_state_pointers },
    { "MI_LOAD_REGISTER_IMM", decode_load_register_imm },
+   { "MI_STORE_DATA_IMM", decode_store_data_imm },
    { "3DSTATE_PIPELINED_POINTERS", decode_pipelined_pointers },
    { "3DSTATE_CPS_POINTERS", decode_cps_pointers },
    { "CONSTANT_BUFFER", decode_gfx4_constant_buffer },
@@ -1745,6 +1767,8 @@ intel_print_batch(struct intel_batch_decode_ctx *ctx,
       } else if (strcmp(inst->name, "MI_BATCH_BUFFER_END") == 0) {
          break;
       }
+
+      ctx->shader_hash.last_inst = inst;
    }
 
    ctx->n_batch_buffer_start--;
diff --git a/src/intel/decoder/intel_batch_decoder_gen.c b/src/intel/decoder/intel_batch_decoder_gen.c
index 6ae50ffb705..6efb230b7b6 100644
--- a/src/intel/decoder/intel_batch_decoder_gen.c
+++ b/src/intel/decoder/intel_batch_decoder_gen.c
@@ -21,7 +21,25 @@ ctx_disassemble_program_gen(struct intel_batch_decode_ctx *ctx,
    if (!bo.map)
       return;
 
-   fprintf(ctx->fp, "\nReferenced %s:\n", name);
+   fprintf(ctx->fp, "\nReferenced %s (ksp: 0x%" PRIx32, name, ksp);
+   if (ctx->shader_hash.last_inst &&
+       !strcmp(ctx->shader_hash.last_inst->name, "MI_STORE_DATA_IMM")) {
+      /* We only consider a recorded hash valid when the previously parsed
+       * instruction is the token.
+       */
+      fprintf(ctx->fp, " hash: 0x%" PRIx64 "): \n", ctx->shader_hash.hash);
+      /* FIXME: Only the hash of the first shader is available now.
+       *
+       * For a targeted shader submission command which can have more than
+       * one shader, the dummy MI_STORE_DATA_IMM token instruction only
+       * contains the hash of the first shader. In this case, we invalidate
+       * the last instruction here so that the following shaders won't be
+       * printed out with the hash of the first.
+       */
+      ctx->shader_hash.last_inst = NULL;
+   } else {
+      fprintf(ctx->fp, "):\n");
+   }
 
    const int size = gen_find_shader_size(&ctx->devinfo, bo.map, 0, bo.size);
    if (size > 0) {
diff --git a/src/intel/decoder/intel_decoder.h b/src/intel/decoder/intel_decoder.h
index 28d29757cdb..402b4092db1 100644
--- a/src/intel/decoder/intel_decoder.h
+++ b/src/intel/decoder/intel_decoder.h
@@ -255,6 +255,13 @@ struct intel_batch_decode_bo {
    const void *map;
 };
 
+struct intel_batch_decode_hash {
+   /* Record the previous parsed command for cross-instruction tracking.
+    */
+   const struct intel_group *last_inst;
+   uint64_t hash;
+};
+
 struct intel_batch_decode_ctx {
    /**
     * Return information about the buffer containing the given address.
@@ -297,6 +304,7 @@ struct intel_batch_decode_ctx {
    struct hash_table *commands;
    struct hash_table *filters;
    struct hash_table *stats;
+   struct intel_batch_decode_hash shader_hash;
 
    void (*disassemble_program)(struct intel_batch_decode_ctx *ctx,
                                uint32_t ksp,