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radv: determine the workgroup size for TCS earlier
This can be done before linking shader info pass. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27396>
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1 changed files with 10 additions and 5 deletions
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@ -1239,6 +1239,16 @@ radv_nir_shader_info_pass(struct radv_device *device, const struct nir_shader *n
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info->cs.uses_full_subgroups = pipeline_type != RADV_PIPELINE_RAY_TRACING && !nir->info.internal &&
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(info->workgroup_size % info->wave_size) == 0;
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break;
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case MESA_SHADER_TESS_CTRL:
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if (gfx_state->ts.patch_control_points) {
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info->workgroup_size = ac_compute_lshs_workgroup_size(
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device->physical_device->rad_info.gfx_level, MESA_SHADER_TESS_CTRL, info->num_tess_patches,
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gfx_state->ts.patch_control_points, info->tcs.tcs_vertices_out);
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} else {
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/* Set the maximum possible value when the workgroup size can't be determined. */
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info->workgroup_size = 256;
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}
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break;
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case MESA_SHADER_MESH:
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calc_mesh_workgroup_size(device, nir, info);
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break;
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@ -1626,16 +1636,11 @@ radv_link_shaders_info(struct radv_device *device, struct radv_shader_stage *pro
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* optimize barriers.
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*/
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vs_stage->info.workgroup_size = 256;
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tcs_stage->info.workgroup_size = 256;
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} else {
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vs_stage->info.workgroup_size = ac_compute_lshs_workgroup_size(
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device->physical_device->rad_info.gfx_level, MESA_SHADER_VERTEX, tcs_stage->info.num_tess_patches,
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gfx_state->ts.patch_control_points, tcs_stage->info.tcs.tcs_vertices_out);
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tcs_stage->info.workgroup_size = ac_compute_lshs_workgroup_size(
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device->physical_device->rad_info.gfx_level, MESA_SHADER_TESS_CTRL, tcs_stage->info.num_tess_patches,
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gfx_state->ts.patch_control_points, tcs_stage->info.tcs.tcs_vertices_out);
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if (!radv_use_llvm_for_stage(device, MESA_SHADER_VERTEX)) {
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/* When the number of TCS input and output vertices are the same (typically 3):
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* - There is an equal amount of LS and HS invocations
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