fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2025-12-31 03:20:09 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

iris/xe3+: Set RegistersPerThread during shader state setup based on prog_data.

Browse source 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32664>
This commit is contained in:
Francisco Jerez 2024-09-18 14:31:27 -07:00 • committed by Marge Bot
parent f6a1c51de7
commit 2a12ea3df0
2 changed files with 31 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

5
src/gallium/drivers/iris/iris_indirect_gen.c
View file

@ -328,6 +328,11 @@ emit_indirect_generate_draw(struct iris_batch *batch,
ps.KernelStartPointer2 = KSP(ice->draw.generation.shader) +
brw_wm_prog_data_prog_offset(wm_prog_data, ps, 2);
#endif
#if GFX_VER >= 30
ps.RegistersPerThread = ptl_register_blocks(wm_prog_data->base.grf_used);
#endif
#else
ps.DispatchGRFStartRegisterForConstantSetupData0 =
elk_wm_prog_data_dispatch_grf_start_reg(wm_prog_data, ps, 0);

26
src/gallium/drivers/iris/iris_state.c
View file

@ -5136,6 +5136,9 @@ iris_store_vs_state(const struct intel_device_info *devinfo,
#endif
vs.UserClipDistanceCullTestEnableBitmask =
vue_data->cull_distance_mask;
#if GFX_VER >= 30
vs.RegistersPerThread = ptl_register_blocks(shader->brw_prog_data->grf_used);
#endif
}
}
@ -5181,6 +5184,10 @@ iris_store_tcs_state(const struct intel_device_info *devinfo,
#endif
hs.IncludePrimitiveID = tcs_data->include_primitive_id;
#endif
#if GFX_VER >= 30
hs.RegistersPerThread = ptl_register_blocks(shader->brw_prog_data->grf_used);
#endif
}
}
@ -5210,6 +5217,10 @@ iris_store_tes_state(const struct intel_device_info *devinfo,
#endif
ds.UserClipDistanceCullTestEnableBitmask =
vue_data->cull_distance_mask;
#if GFX_VER >= 30
ds.RegistersPerThread = ptl_register_blocks(shader->brw_prog_data->grf_used);
#endif
}
iris_pack_command(GENX(3DSTATE_TE), te_state, te) {
@ -5289,6 +5300,10 @@ iris_store_gs_state(const struct intel_device_info *devinfo,
gs.VertexURBEntryOutputReadOffset = urb_entry_write_offset;
gs.VertexURBEntryOutputLength = MAX2(urb_entry_output_length, 1);
#if GFX_VER >= 30
gs.RegistersPerThread = ptl_register_blocks(shader->brw_prog_data->grf_used);
#endif
}
}
@ -5317,6 +5332,10 @@ iris_store_fs_state(const struct intel_device_info *devinfo,
shader->ubo_ranges[0].length > 0;
#endif
#if GFX_VER >= 30
ps.RegistersPerThread = ptl_register_blocks(shader->brw_prog_data->grf_used);
#endif
/* From the documentation for this packet:
* "If the PS kernel does not need the Position XY Offsets to
* compute a Position Value, then this field should be programmed
@ -5413,6 +5432,10 @@ iris_store_cs_state(const struct intel_device_info *devinfo,
desc.ThreadPreemption = false;
#elif GFX_VER >= 12
desc.ThreadPreemptionDisable = true;
#endif
#if GFX_VER >= 30
desc.RegistersPerThread = ptl_register_blocks(
shader->brw_prog_data->grf_used);
#endif
}
}
@ -9085,6 +9108,9 @@ iris_upload_compute_walker(struct iris_context *ice,
idd.BindingTableEntryCount = devinfo->verx10 == 125 ?
0 : MIN2(shader->bt.size_bytes / 4, 31);
idd.NumberOfBarriers = cs_data->uses_barrier;
#if GFX_VER >= 30
idd.RegistersPerThread = ptl_register_blocks(shader->brw_prog_data->grf_used);
#endif
iris_measure_snapshot(ice, batch, INTEL_SNAPSHOT_COMPUTE, NULL, NULL, NULL);