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freedreno/ir3: Add a NIR pass to select tex instructions eligible for pre-fetch
The pass should run once at the end of shader compilation, for a4xx onwards. It iterates texture sampling instructions and mark those eligibile for pre-dispatch by changing the tex op from 'tex' to 'tex_prefetch'. An instruction is eligibile if: * The coordinate is a vector where all its components come from a shader input. * The order of the components match exactly that of the input (no swizzles). * The instruction is in the 'main' function, and in the outer most-block. The first two restrictions were arrived to empirically, so more testing could tighten or loosen it. The 3rd restriction is there to allow moving the instructions eligible for pre-dispatch to the beginning of the shader, so that we don't block the registers holding the result for too long. Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
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@ -40,6 +40,9 @@ bool ir3_nir_lower_io_offsets(nir_shader *shader);
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bool ir3_nir_lower_load_barycentric_at_sample(nir_shader *shader);
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bool ir3_nir_lower_load_barycentric_at_offset(nir_shader *shader);
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bool ir3_nir_move_varying_inputs(nir_shader *shader);
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int ir3_nir_coord_offset(nir_ssa_def *ssa);
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bool ir3_nir_lower_tex_prefetch(nir_shader *shader);
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void ir3_nir_lower_vs_to_explicit_io(nir_shader *shader, struct ir3_shader *s);
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void ir3_nir_lower_gs(nir_shader *shader, struct ir3_shader *s);
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195
src/freedreno/ir3/ir3_nir_lower_tex_prefetch.c
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195
src/freedreno/ir3/ir3_nir_lower_tex_prefetch.c
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@ -0,0 +1,195 @@
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/*
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* Copyright © 2019 Igalia S.L.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#include "ir3_nir.h"
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/**
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* A pass which detects tex instructions which are candidate to be executed
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* prior to FS shader start, and change them to nir_texop_tex_prefetch.
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*/
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static int
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coord_offset(nir_ssa_def *ssa)
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{
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nir_instr *parent_instr = ssa->parent_instr;
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/* The coordinate of a texture sampling instruction eligible for
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* pre-fetch is either going to be a load_interpolated_input/
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* load_input, or a vec2 assembling non-swizzled components of
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* a load_interpolated_input/load_input (due to varying packing)
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*/
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if (parent_instr->type == nir_instr_type_alu) {
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nir_alu_instr *alu = nir_instr_as_alu(parent_instr);
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if (alu->op != nir_op_vec2)
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return -1;
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for (int i = 0; i < 2; i++) {
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if (!alu->src[i].src.is_ssa)
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return -1;
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if (alu->src[i].swizzle[0] != (alu->src[0].swizzle[0] + i))
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return -1;
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if (alu->src[i].src.ssa != alu->src[0].src.ssa)
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return -1;
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}
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int off = coord_offset(alu->src[0].src.ssa);
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if (off < 0)
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return -1;
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return off + alu->src[0].swizzle[0];
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}
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if (parent_instr->type != nir_instr_type_intrinsic)
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return -1;
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nir_intrinsic_instr *input = nir_instr_as_intrinsic(parent_instr);
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if (input->intrinsic != nir_intrinsic_load_interpolated_input)
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return -1;
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/* limit to load_barycentric_pixel, other interpolation modes don't seem
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* to be supported:
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*/
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if (!input->src[0].is_ssa)
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return -1;
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nir_intrinsic_instr *interp =
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nir_instr_as_intrinsic(input->src[0].ssa->parent_instr);
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if (interp->intrinsic != nir_intrinsic_load_barycentric_pixel)
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return -1;
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/* we also need a const input offset: */
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if (!nir_src_is_const(input->src[1]))
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return -1;
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unsigned base = nir_src_as_uint(input->src[1]) + nir_intrinsic_base(input);
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unsigned comp = nir_intrinsic_component(input);
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return (4 * base) + comp;
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}
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int
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ir3_nir_coord_offset(nir_ssa_def *ssa)
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{
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/* only prefetch for simple 2d tex fetch case. Note this check only
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* applies to the tex coord src itself, and not in the case where
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* we recursively chase a vecN's src.
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*/
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if (ssa->num_components != 2)
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return -1;
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return coord_offset(ssa);
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}
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static bool
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has_src(nir_tex_instr *tex, nir_tex_src_type type)
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{
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return nir_tex_instr_src_index(tex, type) > 0;
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}
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static bool
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lower_tex_prefetch_block(nir_block *block)
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{
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bool progress = false;
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nir_foreach_instr_safe(instr, block) {
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if (instr->type != nir_instr_type_tex)
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continue;
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nir_tex_instr *tex = nir_instr_as_tex(instr);
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if (tex->op != nir_texop_tex)
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continue;
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if (has_src(tex, nir_tex_src_bias) ||
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has_src(tex, nir_tex_src_lod) ||
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has_src(tex, nir_tex_src_comparator) ||
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has_src(tex, nir_tex_src_projector) ||
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has_src(tex, nir_tex_src_offset) ||
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has_src(tex, nir_tex_src_ddx) ||
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has_src(tex, nir_tex_src_ddy) ||
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has_src(tex, nir_tex_src_ms_index) ||
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has_src(tex, nir_tex_src_texture_offset) ||
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has_src(tex, nir_tex_src_sampler_offset))
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continue;
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int idx = nir_tex_instr_src_index(tex, nir_tex_src_coord);
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/* First source should be the sampling coordinate. */
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nir_tex_src *coord = &tex->src[idx];
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debug_assert(coord->src.is_ssa);
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if (ir3_nir_coord_offset(coord->src.ssa) >= 0) {
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tex->op = nir_texop_tex_prefetch;
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progress |= true;
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}
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}
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return progress;
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}
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static bool
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lower_tex_prefetch_func(nir_function_impl *impl)
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{
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/* Only instructions in the the outer-most block are considered
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* eligible for pre-dispatch, because they need to be move-able
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* to the beginning of the shader to avoid locking down the
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* register holding the pre-fetched result for too long.
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*/
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nir_block *block = nir_start_block(impl);
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if (!block)
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return false;
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bool progress = lower_tex_prefetch_block(block);
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if (progress) {
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nir_metadata_preserve(impl, nir_metadata_block_index |
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nir_metadata_dominance);
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}
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return progress;
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}
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bool
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ir3_nir_lower_tex_prefetch(nir_shader *shader)
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{
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bool progress = false;
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assert(shader->info.stage == MESA_SHADER_FRAGMENT);
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nir_foreach_function(function, shader) {
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/* Only texture sampling instructions inside the main function
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* are eligible for pre-dispatch.
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*/
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if (!function->impl || !function->is_entrypoint)
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continue;
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progress |= lower_tex_prefetch_func(function->impl);
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}
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return progress;
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}
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@ -67,6 +67,7 @@ libfreedreno_ir3_files = files(
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'ir3_nir_lower_load_barycentric_at_offset.c',
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'ir3_nir_lower_io_offsets.c',
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'ir3_nir_lower_tess.c',
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'ir3_nir_lower_tex_prefetch.c',
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'ir3_nir_lower_tg4_to_tex.c',
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'ir3_nir_move_varying_inputs.c',
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'ir3_print.c',
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