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https://gitlab.freedesktop.org/mesa/mesa.git
synced 2026-01-03 13:40:11 +01:00
remove dead pageflip code
This commit is contained in:
Brian
parent
b8897d7481
commit
29feee2c02
2 changed files with 2 additions and 240 deletions
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@ -41,22 +41,6 @@
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#include "state_tracker/st_cb_fbo.h"
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/* This block can be removed when libdrm >= 2.3.1 is required */
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#ifndef DRM_VBLANK_FLIP
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#define DRM_VBLANK_FLIP 0x8000000
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typedef struct drm_i915_flip {
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int pipes;
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} drm_i915_flip_t;
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#undef DRM_IOCTL_I915_FLIP
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#define DRM_IOCTL_I915_FLIP DRM_IOW(DRM_COMMAND_BASE + DRM_I915_FLIP, \
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drm_i915_flip_t)
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#endif
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/**
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* Return the pipe_surface for the given renderbuffer.
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@ -262,71 +246,6 @@ intelWindowMoved(struct intel_context *intel)
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GLint areaA = driIntersectArea( drw_rect, pipeA_rect );
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GLint areaB = driIntersectArea( drw_rect, pipeB_rect );
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GLuint flags = intel_fb->vblank_flags;
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#if PF
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GLboolean pf_active;
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GLint pf_planes;
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#endif
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/* Update page flipping info
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*/
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#if PF
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pf_planes = 0;
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if (areaA > 0)
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pf_planes |= 1;
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if (areaB > 0)
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pf_planes |= 2;
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#endif
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#if PF
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intel_fb->pf_current_page = (intel->sarea->pf_current_page >>
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(intel_fb->pf_planes & 0x2)) & 0x3;
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intel_fb->pf_num_pages = 2 /*intel->intelScreen->third.handle ? 3 : 2*/;
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pf_active = pf_planes && (pf_planes & intel->sarea->pf_active) == pf_planes;
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if (pf_active != intel_fb->pf_active)
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DBG(LOCK, "%s - Page flipping %sactive\n",
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__progname, pf_active ? "" : "in");
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if (pf_active) {
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/* Sync pages between planes if we're flipping on both at the same time */
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if (pf_planes == 0x3 && pf_planes != intel_fb->pf_planes &&
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(intel->sarea->pf_current_page & 0x3) !=
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(((intel->sarea->pf_current_page) >> 2) & 0x3)) {
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drm_i915_flip_t flip;
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if (intel_fb->pf_current_page ==
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(intel->sarea->pf_current_page & 0x3)) {
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/* XXX: This is ugly, but emitting two flips 'in a row' can cause
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* lockups for unknown reasons.
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*/
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intel->sarea->pf_current_page =
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intel->sarea->pf_current_page & 0x3;
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intel->sarea->pf_current_page |=
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((intel_fb->pf_current_page + intel_fb->pf_num_pages - 1) %
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intel_fb->pf_num_pages) << 2;
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flip.pipes = 0x2;
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} else {
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intel->sarea->pf_current_page =
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intel->sarea->pf_current_page & (0x3 << 2);
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intel->sarea->pf_current_page |=
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(intel_fb->pf_current_page + intel_fb->pf_num_pages - 1) %
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intel_fb->pf_num_pages;
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flip.pipes = 0x1;
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}
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drmCommandWrite(intel->driFd, DRM_I915_FLIP, &flip, sizeof(flip));
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}
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intel_fb->pf_planes = pf_planes;
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}
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intel_fb->pf_active = pf_active;
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#endif
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/* Update vblank info
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*/
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@ -339,33 +258,17 @@ intelWindowMoved(struct intel_context *intel)
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if (flags != intel_fb->vblank_flags && intel_fb->vblank_flags &&
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!(intel_fb->vblank_flags & VBLANK_FLAG_NO_IRQ)) {
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drmVBlank vbl;
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#if PF
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int i;
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#endif
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vbl.request.type = DRM_VBLANK_ABSOLUTE;
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if ( intel_fb->vblank_flags & VBLANK_FLAG_SECONDARY ) {
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vbl.request.type |= DRM_VBLANK_SECONDARY;
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}
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#if PF
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for (i = 0; i < intel_fb->pf_num_pages; i++) {
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if ((intel_fb->vbl_waited - intel_fb->vbl_pending[i]) <= (1<<23))
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continue;
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vbl.request.sequence = intel_fb->vbl_pending[i];
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drmWaitVBlank(intel->driFd, &vbl);
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}
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#endif
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intel_fb->vblank_flags = flags;
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driGetCurrentVBlank(dPriv, intel_fb->vblank_flags, &intel_fb->vbl_seq);
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intel_fb->vbl_waited = intel_fb->vbl_seq;
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#if PF
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for (i = 0; i < intel_fb->pf_num_pages; i++) {
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intel_fb->vbl_pending[i] = intel_fb->vbl_waited;
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}
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#endif
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}
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}
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@ -373,103 +276,6 @@ intelWindowMoved(struct intel_context *intel)
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/* Emit wait for pending flips */
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#if 0
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void
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intel_wait_flips(struct intel_context *intel, GLuint batch_flags)
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{
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struct intel_framebuffer *intel_fb =
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(struct intel_framebuffer *) intel->ctx.DrawBuffer;
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struct intel_renderbuffer *intel_rb =
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intel_get_renderbuffer(&intel_fb->Base,
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intel_fb->Base._ColorDrawBufferMask[0] ==
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BUFFER_BIT_FRONT_LEFT ? BUFFER_FRONT_LEFT :
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BUFFER_BACK_LEFT);
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if (intel_fb->Base.Name == 0 && intel_rb->pf_pending == intel_fb->pf_seq) {
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GLint pf_planes = intel_fb->pf_planes;
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BATCH_LOCALS;
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/* Wait for pending flips to take effect */
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BEGIN_BATCH(2, batch_flags);
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OUT_BATCH(pf_planes & 0x1 ? (MI_WAIT_FOR_EVENT | MI_WAIT_FOR_PLANE_A_FLIP)
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: 0);
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OUT_BATCH(pf_planes & 0x2 ? (MI_WAIT_FOR_EVENT | MI_WAIT_FOR_PLANE_B_FLIP)
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: 0);
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ADVANCE_BATCH();
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intel_rb->pf_pending--;
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}
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}
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#endif
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#if 0
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/* Flip the front & back buffers
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*/
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static GLboolean
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intelPageFlip(const __DRIdrawablePrivate * dPriv)
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{
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struct intel_context *intel;
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int ret;
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struct intel_framebuffer *intel_fb = dPriv->driverPrivate;
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DBG(SWAP, "%s\n", __FUNCTION__);
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assert(dPriv);
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assert(dPriv->driContextPriv);
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assert(dPriv->driContextPriv->driverPrivate);
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intel = (struct intel_context *) dPriv->driContextPriv->driverPrivate;
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if (intel->intelScreen->drmMinor < 9)
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return GL_FALSE;
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st_flush(intel->st);
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ret = 0;
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LOCK_HARDWARE(intel);
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if (dPriv->numClipRects && intel_fb->pf_active) {
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drm_i915_flip_t flip;
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flip.pipes = intel_fb->pf_planes;
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ret = drmCommandWrite(intel->driFd, DRM_I915_FLIP, &flip, sizeof(flip));
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}
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UNLOCK_HARDWARE(intel);
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if (ret || !intel_fb->pf_active)
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return GL_FALSE;
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if (!dPriv->numClipRects) {
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usleep(10000); /* throttle invisible client 10ms */
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}
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intel_fb->pf_current_page = (intel->sarea->pf_current_page >>
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(intel_fb->pf_planes & 0x2)) & 0x3;
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if (dPriv->numClipRects != 0) {
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intel_get_renderbuffer(&intel_fb->Base, BUFFER_FRONT_LEFT)->pf_pending =
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intel_get_renderbuffer(&intel_fb->Base, BUFFER_BACK_LEFT)->pf_pending =
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++intel_fb->pf_seq;
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}
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#if 0
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intel_flip_renderbuffers(intel_fb);
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intel_draw_buffer(&intel->ctx, &intel_fb->Base);
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#endif
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DBG(SWAP, "%s: success\n", __FUNCTION__);
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return GL_TRUE;
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}
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#endif
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static GLboolean
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intelScheduleSwap(const __DRIdrawablePrivate * dPriv, GLboolean *missed_target)
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{
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@ -477,21 +283,13 @@ intelScheduleSwap(const __DRIdrawablePrivate * dPriv, GLboolean *missed_target)
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unsigned int interval = driGetVBlankInterval(dPriv, intel_fb->vblank_flags);
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struct intel_context *intel =
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intelScreenContext(dPriv->driScreenPriv->private);
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#if PF
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const intelScreenPrivate *intelScreen = intel->intelScreen;
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#endif
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unsigned int target;
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drm_i915_vblank_swap_t swap;
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GLboolean ret;
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/* XXX: Scheduled buffer swaps don't work with private back buffers yet */
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if (1 || !intel_fb->vblank_flags ||
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(intel_fb->vblank_flags & VBLANK_FLAG_NO_IRQ)
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#if PF
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intelScreen->drmMinor < (intel_fb->pf_active ? 9 : 6)
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#endif
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)
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(intel_fb->vblank_flags & VBLANK_FLAG_NO_IRQ))
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return GL_FALSE;
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swap.seqtype = DRM_VBLANK_ABSOLUTE;
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@ -513,16 +311,6 @@ intelScheduleSwap(const __DRIdrawablePrivate * dPriv, GLboolean *missed_target)
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intel_batchbuffer_flush(intel->batch);
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#if PF
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if ( intel_fb->pf_active ) {
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swap.seqtype |= DRM_VBLANK_FLIP;
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intel_fb->pf_current_page = (((intel->sarea->pf_current_page >>
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(intel_fb->pf_planes & 0x2)) & 0x3) + 1) %
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intel_fb->pf_num_pages;
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}
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#endif
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if (!drmCommandWriteRead(intel->driFd, DRM_I915_VBLANK_SWAP, &swap,
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sizeof(swap))) {
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intel_fb->vbl_seq = swap.sequence;
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@ -538,22 +326,8 @@ intelScheduleSwap(const __DRIdrawablePrivate * dPriv, GLboolean *missed_target)
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intel_fb->vbl_seq;
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#endif
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if (swap.seqtype & DRM_VBLANK_FLIP) {
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#if 0
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intel_flip_renderbuffers(intel_fb);
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intel_draw_buffer(&intel->ctx, intel->ctx.DrawBuffer);
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#endif
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}
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ret = GL_TRUE;
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} else {
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#if PF
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if (swap.seqtype & DRM_VBLANK_FLIP) {
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intel_fb->pf_current_page = ((intel->sarea->pf_current_page >>
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(intel_fb->pf_planes & 0x2)) & 0x3) %
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intel_fb->pf_num_pages;
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}
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#endif
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ret = GL_FALSE;
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}
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@ -39,16 +39,6 @@ struct intel_framebuffer
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{
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struct gl_framebuffer Base;
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#define PF 0
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#if PF
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/* Drawable page flipping state */
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GLboolean pf_active;
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GLuint pf_seq;
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GLint pf_planes;
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GLint pf_current_page;
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GLint pf_num_pages;
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#endif
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/* VBI
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*/
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GLuint vbl_seq;
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@ -69,8 +59,6 @@ extern void intelDisplayBuffer(__DRIdrawablePrivate * dPriv,
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struct pipe_surface *surf,
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const drm_clip_rect_t * rect);
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extern void intel_wait_flips(struct intel_context *intel, GLuint batch_flags);
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extern void intelSwapBuffers(__DRIdrawablePrivate * dPriv);
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extern void intelWindowMoved(struct intel_context *intel);
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