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nak: Add an ftz bit to a bunch of float ops

Browse source 
Specifically, OpFAdd, FFma, FMnMx, FMul, and FSwzAdd

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26557>
This commit is contained in:
Faith Ekstrand 2023-12-06 17:09:27 -06:00 • committed by Marge Bot
parent 6881ff4c99
commit 29bfdcd7c1
4 changed files with 45 additions and 9 deletions
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2
src/nouveau/compiler/nak/builder.rs
View file

@ -177,6 +177,7 @@ pub trait SSABuilder: Builder {
srcs: [x, y],
saturate: false,
rnd_mode: FRndMode::NearestEven,
ftz: false,
});
dst
}
@ -188,6 +189,7 @@ pub trait SSABuilder: Builder {
srcs: [x, y],
saturate: false,
rnd_mode: FRndMode::NearestEven,
ftz: false,
});
dst
}

12
src/nouveau/compiler/nak/encode_sm70.rs
View file

@ -425,7 +425,7 @@ impl SM70Instr {
}
self.set_bit(77, op.saturate);
self.set_rnd_mode(78..80, op.rnd_mode);
self.set_bit(80, false); /* TODO: FTZ */
self.set_bit(80, op.ftz);
self.set_bit(81, false); /* TODO: DNZ */
}
@ -440,7 +440,7 @@ impl SM70Instr {
self.set_bit(76, false); /* TODO: DNZ */
self.set_bit(77, op.saturate);
self.set_rnd_mode(78..80, op.rnd_mode);
self.set_bit(80, false); /* TODO: FTZ */
self.set_bit(80, op.ftz);
}
fn encode_fmnmx(&mut self, op: &OpFMnMx) {
@ -452,7 +452,7 @@ impl SM70Instr {
ALUSrc::from_src(&Src::new_zero()),
);
self.set_pred_src(87..90, 90, op.min);
self.set_bit(80, false); /* TODO: FMZ */
self.set_bit(80, op.ftz);
}
fn encode_fmul(&mut self, op: &OpFMul) {
@ -466,7 +466,7 @@ impl SM70Instr {
self.set_bit(76, false); /* TODO: DNZ */
self.set_bit(77, op.saturate);
self.set_rnd_mode(78..80, op.rnd_mode);
self.set_bit(80, false); /* TODO: FTZ */
self.set_bit(80, op.ftz);
self.set_field(84..87, 0x4_u8) /* TODO: PDIV */
}
@ -561,7 +561,7 @@ impl SM70Instr {
self.set_bit(77, false); /* NDV */
self.set_rnd_mode(78..80, op.rnd_mode);
self.set_bit(80, false); /* TODO: FTZ */
self.set_bit(80, op.ftz);
}
fn encode_mufu(&mut self, op: &OpMuFu) {
@ -877,7 +877,7 @@ impl SM70Instr {
self.set_field(75..77, (op.dst_type.bits() / 8).ilog2());
self.set_bit(77, false); /* NTZ */
self.set_rnd_mode(78..80, op.rnd_mode);
self.set_bit(80, false); /* FTZ */
self.set_bit(80, op.ftz); /* FTZ */
self.set_bit(81, false); /* DNZ */
self.set_field(84..86, (op.src_type.bits() / 8).ilog2());
}

9
src/nouveau/compiler/nak/from_nir.rs
View file

@ -535,6 +535,7 @@ impl<'a> ShaderFromNir<'a> {
dst_is_signed,
),
rnd_mode: FRndMode::Zero,
ftz: false,
});
dst
}
@ -553,6 +554,7 @@ impl<'a> ShaderFromNir<'a> {
srcs: [x, y],
saturate: saturate,
rnd_mode: FRndMode::NearestEven,
ftz: false,
});
dst
}
@ -591,6 +593,7 @@ impl<'a> ShaderFromNir<'a> {
srcs: [srcs[0], srcs[1], srcs[2]],
saturate: self.try_saturate_alu_dst(&alu.def),
rnd_mode: FRndMode::NearestEven,
ftz: false,
};
b.push_op(ffma);
dst
@ -614,6 +617,7 @@ impl<'a> ShaderFromNir<'a> {
dst: dst.into(),
srcs: [srcs[0], srcs[1]],
min: (alu.op == nir_op_fmin).into(),
ftz: false,
});
dst
}
@ -625,6 +629,7 @@ impl<'a> ShaderFromNir<'a> {
srcs: [srcs[0], srcs[1]],
saturate: self.try_saturate_alu_dst(&alu.def),
rnd_mode: FRndMode::NearestEven,
ftz: false,
};
b.push_op(fmul);
dst
@ -673,6 +678,7 @@ impl<'a> ShaderFromNir<'a> {
srcs: [srcs[0], 0.into()],
saturate: true,
rnd_mode: FRndMode::NearestEven,
ftz: false,
});
dst
}
@ -1154,6 +1160,7 @@ impl<'a> ShaderFromNir<'a> {
FSwzAddOp::SubRight,
],
rnd_mode: FRndMode::NearestEven,
ftz: false,
});
dst
@ -1185,6 +1192,7 @@ impl<'a> ShaderFromNir<'a> {
FSwzAddOp::SubRight,
],
rnd_mode: FRndMode::NearestEven,
ftz: false,
});
dst
@ -2499,6 +2507,7 @@ impl<'a> ShaderFromNir<'a> {
srcs: [depth.into(), 0.into()],
saturate: true,
rnd_mode: FRndMode::NearestEven,
ftz: false,
});
srcs.push(sat_depth.into());
}

31
src/nouveau/compiler/nak/ir.rs
View file

@ -2182,6 +2182,7 @@ pub struct OpFAdd {
pub saturate: bool,
pub rnd_mode: FRndMode,
pub ftz: bool,
}
impl DisplayOp for OpFAdd {
@ -2193,6 +2194,9 @@ impl DisplayOp for OpFAdd {
if self.rnd_mode != FRndMode::NearestEven {
write!(f, "{}", self.rnd_mode)?;
}
if self.ftz {
write!(f, ".ftz")?;
}
write!(f, " {} {}", self.srcs[0], self.srcs[1],)
}
}
@ -2208,6 +2212,7 @@ pub struct OpFFma {
pub saturate: bool,
pub rnd_mode: FRndMode,
pub ftz: bool,
}
impl DisplayOp for OpFFma {
@ -2219,6 +2224,9 @@ impl DisplayOp for OpFFma {
if self.rnd_mode != FRndMode::NearestEven {
write!(f, "{}", self.rnd_mode)?;
}
if self.ftz {
write!(f, ".ftz")?;
}
write!(f, " {} {} {}", self.srcs[0], self.srcs[1], self.srcs[2])
}
}
@ -2234,11 +2242,18 @@ pub struct OpFMnMx {
#[src_type(Pred)]
pub min: Src,
pub ftz: bool,
}
impl DisplayOp for OpFMnMx {
fn fmt_op(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
write!(f, "fmnmx {} {} {}", self.srcs[0], self.srcs[1], self.min)
let ftz = if self.ftz { ".ftz" } else { "" };
write!(
f,
"fmnmx{} {} {} {}",
ftz, self.srcs[0], self.srcs[1], self.min
)
}
}
impl_display_for_op!(OpFMnMx);
@ -2253,6 +2268,7 @@ pub struct OpFMul {
pub saturate: bool,
pub rnd_mode: FRndMode,
pub ftz: bool,
}
impl DisplayOp for OpFMul {
@ -2264,6 +2280,9 @@ impl DisplayOp for OpFMul {
if self.rnd_mode != FRndMode::NearestEven {
write!(f, "{}", self.rnd_mode)?;
}
if self.ftz {
write!(f, ".ftz")?;
}
write!(f, " {} {}", self.srcs[0], self.srcs[1],)
}
}
@ -2345,6 +2364,7 @@ pub struct OpFSwzAdd {
pub srcs: [Src; 2],
pub rnd_mode: FRndMode,
pub ftz: bool,
pub ops: [FSwzAddOp; 4],
}
@ -2355,6 +2375,9 @@ impl DisplayOp for OpFSwzAdd {
if self.rnd_mode != FRndMode::NearestEven {
write!(f, "{}", self.rnd_mode)?;
}
if self.ftz {
write!(f, ".ftz")?;
}
write!(
f,
" {} {} [{}, {}, {}, {}]",
@ -2959,6 +2982,7 @@ pub struct OpF2I {
pub src_type: FloatType,
pub dst_type: IntType,
pub rnd_mode: FRndMode,
pub ftz: bool,
}
impl SrcsAsSlice for OpF2I {
@ -2982,10 +3006,11 @@ impl SrcsAsSlice for OpF2I {
impl DisplayOp for OpF2I {
fn fmt_op(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
let ftz = if self.ftz { ".ftz" } else { "" };
write!(
f,
"f2i{}{}{} {}",
self.dst_type, self.src_type, self.rnd_mode, self.src,
"f2i{}{}{}{} {}",
self.dst_type, self.src_type, self.rnd_mode, ftz, self.src,
)
}
}