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gallivm: clear Altivec NJ bit

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This patch enforces the clear of NJ bit in VSCR Altivec register so
denormal numbers are handles as expected by IEEE standards.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
This commit is contained in:
Adhemerval Zanella 2012-11-22 11:55:35 -06:00 • committed by José Fonseca
parent 43ce9efdbf
commit 29ba79b2c9
1 changed files with 19 additions and 0 deletions
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19
src/gallium/auxiliary/gallivm/lp_bld_init.c
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@ -468,6 +468,25 @@ lp_build_init(void)
util_cpu_caps.has_avx = 0;
}
#ifdef PIPE_ARCH_PPC_64
/* Set the NJ bit in VSCR to 0 so denormalized values are handled as
* specified by IEEE standard (PowerISA 2.06 - Section 6.3). This garantees
* that some rounding and half-float to float handling does not round
* incorrectly to 0.
*/
if (util_cpu_caps.has_altivec) {
unsigned short mask[] = { 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFE, 0xFFFF };
__asm (
"mfvscr %%v1\n"
"vand %0,%%v1,%0\n"
"mtvscr %0"
:
: "r" (*mask)
);
}
#endif
gallivm_initialized = TRUE;
#if 0