From 294644643e7402af755bdf6b441e320843af65ff Mon Sep 17 00:00:00 2001 From: Lionel Landwerlin Date: Wed, 20 May 2026 22:00:51 +0300 Subject: [PATCH] brw: avoid requiring a valid render target for empty fragment shaders Dishonered 2 or DXVK is creating pipelines with empty fragment shaders. With alpha-to-coverage a dynamic state, we currently consider there is a need for a render target but if the shader is not writing anything, it's not needed. This change only considers the color output writes as it's the alpha channel there that is used for coverage computation. Signed-off-by: Lionel Landwerlin Reviewed-by: Ivan Briano Part-of: --- src/intel/compiler/brw/brw_compile_fs.cpp | 14 ++++++-------- src/intel/compiler/brw/brw_nir.h | 4 +++- 2 files changed, 9 insertions(+), 9 deletions(-) diff --git a/src/intel/compiler/brw/brw_compile_fs.cpp b/src/intel/compiler/brw/brw_compile_fs.cpp index d5cf8709b1a..9b269f1b641 100644 --- a/src/intel/compiler/brw/brw_compile_fs.cpp +++ b/src/intel/compiler/brw/brw_compile_fs.cpp @@ -58,7 +58,6 @@ brw_emit_single_fb_write(brw_shader &s, const brw_builder &bld, static void brw_do_emit_fb_writes(brw_shader &s, int nr_color_regions, bool replicate_alpha) { - struct brw_fs_prog_data *prog_data = brw_fs_prog_data(s.prog_data); const brw_builder bld = brw_builder(&s); brw_fb_write_inst *write = NULL; @@ -89,15 +88,14 @@ brw_do_emit_fb_writes(brw_shader &s, int nr_color_regions, bool replicate_alpha) } if (write == NULL) { - struct brw_fs_prog_key *key = (brw_fs_prog_key*) s.key; - /* Disable null_rt if any non color output is written or if - * alpha_to_coverage can be enabled. Since the alpha_to_coverage bit is - * coming from the BLEND_STATE structure and the HW will avoid reading - * it if null_rt is enabled. + /* Disable null_rt if the shader doesn't write any relevant output. */ const bool use_null_rt = - key->alpha_to_coverage == INTEL_NEVER && - !prog_data->uses_omask; + (s.nir->info.outputs_written & + (BITFIELD_RANGE(FRAG_RESULT_DATA0, 8) | + BITFIELD_BIT(FRAG_RESULT_DEPTH) | + BITFIELD_BIT(FRAG_RESULT_STENCIL) | + BITFIELD64_BIT(FRAG_RESULT_SAMPLE_MASK))) == 0; /* Even if there's no color buffers enabled, we still need to send alpha * out the pipeline to our null renderbuffer to support alpha-testing, diff --git a/src/intel/compiler/brw/brw_nir.h b/src/intel/compiler/brw/brw_nir.h index 8742f8e6d5f..49069d73ac9 100644 --- a/src/intel/compiler/brw/brw_nir.h +++ b/src/intel/compiler/brw/brw_nir.h @@ -131,7 +131,9 @@ brw_nir_fs_needs_null_rt(const struct intel_device_info *devinfo, BITFIELD64_BIT(FRAG_RESULT_SAMPLE_MASK))) return true; - return alpha_to_coverage; + return alpha_to_coverage && + (nir->info.outputs_written & + BITFIELD_RANGE(FRAG_RESULT_DATA0, 8)) != 0; } void brw_preprocess_nir(const struct brw_compiler *compiler,