fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-05-06 02:58:05 +02:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

i965: Set MaxCombinedUniformBlocks properly.

Browse source 
Up until now, we've been letting core Mesa initialize it to 36 for us
(which is presumably BRW_MAX_UBO (12) * (VS+GS+FS stages -> 3)).

With compute and tessellation, we need to increase this.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
This commit is contained in:
Kenneth Graunke 2015-11-13 14:55:50 -08:00
parent 5ee5dfddea
commit 292df19401
1 changed files with 1 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

1
src/mesa/drivers/dri/i965/brw_context.c
View file

@ -391,6 +391,7 @@ brw_initialize_context_constants(struct brw_context *brw)
ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxTextureImageUnits);
ctx->Const.MaxUniformBufferBindings = num_stages * BRW_MAX_UBO;
ctx->Const.MaxCombinedUniformBlocks = num_stages * BRW_MAX_UBO;
ctx->Const.MaxCombinedAtomicBuffers = num_stages * BRW_MAX_ABO;
ctx->Const.MaxCombinedShaderStorageBlocks = num_stages * BRW_MAX_SSBO;
ctx->Const.MaxShaderStorageBufferBindings = num_stages * BRW_MAX_SSBO;