diff --git a/src/gallium/drivers/radeonsi/si_texture.c b/src/gallium/drivers/radeonsi/si_texture.c index 421b9661939..08ff7dd159d 100644 --- a/src/gallium/drivers/radeonsi/si_texture.c +++ b/src/gallium/drivers/radeonsi/si_texture.c @@ -1204,23 +1204,31 @@ static struct si_texture *si_texture_create_object(struct pipe_screen *screen, if (sscreen->info.gfx_level >= GFX9) { tex->can_sample_z = true; tex->can_sample_s = true; - - /* Stencil texturing with HTILE doesn't work - * with mipmapping on Navi10-14. */ - if (sscreen->info.gfx_level == GFX10 && base->last_level > 0) - tex->htile_stencil_disabled = true; } else { tex->can_sample_z = !tex->surface.u.legacy.depth_adjusted; tex->can_sample_s = !tex->surface.u.legacy.stencil_adjusted; + } - /* GFX8 must keep stencil enabled because it can't use Z-only TC-compatible - * HTILE because of a hw bug. This has only a small effect on performance - * because we lose a little bit of Z precision in order to make space for - * stencil in HTILE. + const bool need_htile_stencil_mipmap_bug_workaround = + sscreen->info.has_htile_stencil_mipmap_bug && base->last_level > 0; + if (need_htile_stencil_mipmap_bug_workaround) + tex->htile_stencil_disabled = true; + + if (sscreen->info.has_htile_tc_z_clear_bug_without_stencil && + (tex->surface.flags & RADEON_SURF_TC_COMPATIBLE_HTILE)) { + /* Must keep stencil enabled because the base and delta Z encoding is + * needed to work around the TC Z clear value bug by using + * ZRANGE_PRECISION. + * + * This has only a small effect on performance because we lose a little + * bit of Z precision in order to make space for stencil in HTILE. + * + * If this workaround can't be applied to this texture, + * RADEON_SURF_TC_COMPATIBLE_HTILE must not be set for it, hence the + * assertion. */ - if (sscreen->info.gfx_level == GFX8 && - tex->surface.flags & RADEON_SURF_TC_COMPATIBLE_HTILE) - tex->htile_stencil_disabled = false; + assert(!need_htile_stencil_mipmap_bug_workaround); + tex->htile_stencil_disabled = false; } tex->db_compatible = surface->flags & RADEON_SURF_ZBUFFER;