From 28cf0f52c1faeb3d2bf78b8dd2e78c27d532753d Mon Sep 17 00:00:00 2001 From: Alyssa Rosenzweig Date: Mon, 20 Apr 2026 11:04:33 -0400 Subject: [PATCH] jay/to_binary: handle packing accumulators Signed-off-by: Alyssa Rosenzweig Part-of: --- src/intel/compiler/jay/jay_to_binary.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/src/intel/compiler/jay/jay_to_binary.c b/src/intel/compiler/jay/jay_to_binary.c index 0e7d7757508..2953867eaab 100644 --- a/src/intel/compiler/jay/jay_to_binary.c +++ b/src/intel/compiler/jay/jay_to_binary.c @@ -133,8 +133,9 @@ to_brw_reg(jay_function *f, R = stride(R, 4, 2, 2); } } - } else if (d.file == GPR) { - enum jay_stride def_stride = jay_def_stride(f->shader, d); + } else if (d.file == GPR || d.file == ACCUM) { + enum jay_stride def_stride = + d.file == GPR ? jay_def_stride(f->shader, d) : JAY_STRIDE_4; uint32_t type_bits = jay_type_size_bits(type); unsigned stride_bits = jay_stride_to_bits(def_stride); unsigned simd_width = jay_simd_width_physical(f->shader, I); @@ -151,8 +152,12 @@ to_brw_reg(jay_function *f, offset_B = (reg & mask) * 2; } - R = byte_offset(xe2_vec8_grf(grf, 0), - simd_offs * simd_width * stride_bits / 8); + if (d.file == GPR) { + R = byte_offset(xe2_vec8_grf(grf, 0), + simd_offs * simd_width * stride_bits / 8); + } else { + R = brw_vecn_reg(8, ARF, BRW_ARF_ACCUMULATOR + (grf * 2), 0); + } if (stride_bits == (type_bits * 4)) { R = stride(R, 8, 2, 4);