From 2854c1b778eaa50e3711bd4fa6138520f4aa5442 Mon Sep 17 00:00:00 2001 From: Pierre-Eric Pelloux-Prayer Date: Wed, 6 May 2026 10:58:33 +0200 Subject: [PATCH] radv, radeonsi: do sqtt buffer_size calc using uint64 The final size is uint64_t so use it from the start to avoid overflow issues. Reviewed-by: Samuel Pitoiset Part-of: --- src/amd/vulkan/radv_sqtt.c | 6 +++--- src/gallium/drivers/radeonsi/gfx/si_sqtt.c | 7 +++---- 2 files changed, 6 insertions(+), 7 deletions(-) diff --git a/src/amd/vulkan/radv_sqtt.c b/src/amd/vulkan/radv_sqtt.c index 49658b23475..21be42726c4 100644 --- a/src/amd/vulkan/radv_sqtt.c +++ b/src/amd/vulkan/radv_sqtt.c @@ -346,18 +346,18 @@ radv_sqtt_init_bo(struct radv_device *device) VkDeviceMemory memory, staging_memory; VkBuffer buffer, staging_buffer; VkResult result; - uint64_t size; + uint64_t per_se_size, size; uint64_t va; void *ptr; /* The buffer size and address need to be aligned in HW regs. Align the * size as early as possible so that we do all the allocation & addressing * correctly. */ - device->sqtt.buffer_size = align64(device->sqtt.buffer_size, 1ull << SQTT_BUFFER_ALIGN_SHIFT); + per_se_size = align64(device->sqtt.buffer_size, 1ull << SQTT_BUFFER_ALIGN_SHIFT); /* Compute total size of the thread trace BO for all SEs. */ size = align64(sizeof(struct ac_sqtt_data_info) * max_se, 1ull << SQTT_BUFFER_ALIGN_SHIFT); - size += device->sqtt.buffer_size * (uint64_t)max_se; + size += per_se_size * (uint64_t)max_se; /* Allocate the SQTT buffer (it must be in VRAM). */ const uint32_t memory_type_index = radv_find_memory_index( diff --git a/src/gallium/drivers/radeonsi/gfx/si_sqtt.c b/src/gallium/drivers/radeonsi/gfx/si_sqtt.c index 7efe79fb444..a1de2151d71 100644 --- a/src/gallium/drivers/radeonsi/gfx/si_sqtt.c +++ b/src/gallium/drivers/radeonsi/gfx/si_sqtt.c @@ -24,18 +24,17 @@ si_emit_spi_config_cntl(struct si_context *sctx, static bool si_sqtt_init_bo(struct si_context *sctx) { unsigned max_se = sctx->screen->info.max_se; - uint64_t size; + uint64_t per_se_size, size; /* The buffer size and address need to be aligned in HW regs. Align the * size as early as possible so that we do all the allocation & addressing * correctly. */ - sctx->sqtt->buffer_size = - align64(sctx->sqtt->buffer_size, 1ull << SQTT_BUFFER_ALIGN_SHIFT); + per_se_size = align64(sctx->sqtt->buffer_size, 1ull << SQTT_BUFFER_ALIGN_SHIFT); /* Compute total size of the thread trace BO for all SEs. */ size = align64(sizeof(struct ac_sqtt_data_info) * max_se, 1ull << SQTT_BUFFER_ALIGN_SHIFT); - size += sctx->sqtt->buffer_size * (uint64_t)max_se; + size += per_se_size * (uint64_t)max_se; if (size > UINT32_MAX) return false;