fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-05-09 04:38:03 +02:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

tu: ensure completion of generic-clear resolves for color, depth/stencil clears

Browse source 
Combination of concurrent resolve groups and generic clear support on a750
exposed a problem around color and depth/stencil clears. With all resolves
now non-blocking in nature, we need a guarantee that clears issued through
commands will complete before any future resolves.

To achieve that, in case of generic clears being used, a cache flush is
done in order to generate the CCU_RESOLVE_CLEAN event that will ensure any
future resolve will block until the just-emitted clears are completed.

Fixes following flaky CTS tests on a750:
  dEQP-VK.pipeline.monolithic.framebuffer_attachment.2d_array_32x32_48x48_4_ms
  dEQP-VK.pipeline.pipeline_library.framebuffer_attachment.2d_array_32x32_48x48_4_ms

Signed-off-by: Zan Dobersek <zdobersek@igalia.com>
Fixes: 25b73dff5a ("tu/a7xx: use concurrent resolve groups")
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32242>
This commit is contained in:
Zan Dobersek 2024-11-19 15:08:18 +01:00 • committed by Marge Bot
parent 4477eed302
commit 2817a286e0
2 changed files with 18 additions and 6 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

4
src/freedreno/ci/freedreno-a750-fails.txt
View file

@ -98,7 +98,3 @@ program@execute@builtin@builtin-float-nextafter-1.0.generated@nextafter float16,
program@execute@builtin@builtin-float-nextafter-1.0.generated@nextafter float2,Fail
program@execute@builtin@builtin-float-nextafter-1.0.generated@nextafter float4,Fail
program@execute@builtin@builtin-float-nextafter-1.0.generated@nextafter float8,Fail
# regression in a commit in the range b36a7ce0...f2f4206d
dEQP-VK.pipeline.monolithic.framebuffer_attachment.2d_array_32x32_48x48_4_ms,Fail
dEQP-VK.pipeline.pipeline_library.framebuffer_attachment.2d_array_32x32_48x48_4_ms,Fail

20
src/freedreno/vulkan/tu_clear_blit.cc
View file

@ -3751,7 +3751,8 @@ tu_CmdClearColorImage(VkCommandBuffer commandBuffer,
VK_FROM_HANDLE(tu_cmd_buffer, cmd, commandBuffer);
VK_FROM_HANDLE(tu_image, image, image_h);
if (use_generic_clear_for_image_clear(cmd, image)) {
bool use_generic_clear = use_generic_clear_for_image_clear(cmd, image);
if (use_generic_clear) {
/* Generic clear doesn't go through CCU (or other caches). */
cmd->state.cache.flush_bits |=
TU_CMD_FLAG_CCU_INVALIDATE_COLOR | TU_CMD_FLAG_WAIT_FOR_IDLE;
@ -3766,6 +3767,13 @@ tu_CmdClearColorImage(VkCommandBuffer commandBuffer,
}
tu_emit_resolve_group<CHIP>(cmd, &cmd->cs, &resolve_group);
if (use_generic_clear) {
/* This will emit CCU_RESOLVE_CLEAN which will ensure any future resolves
* proceed only after the just-emitted generic clears are complete.
*/
cmd->state.cache.flush_bits |= TU_CMD_FLAG_BLIT_CACHE_CLEAN;
tu_emit_cache_flush<CHIP>(cmd);
}
}
TU_GENX(tu_CmdClearColorImage);
@ -3781,7 +3789,8 @@ tu_CmdClearDepthStencilImage(VkCommandBuffer commandBuffer,
VK_FROM_HANDLE(tu_cmd_buffer, cmd, commandBuffer);
VK_FROM_HANDLE(tu_image, image, image_h);
if (use_generic_clear_for_image_clear(cmd, image)) {
bool use_generic_clear = use_generic_clear_for_image_clear(cmd, image);
if (use_generic_clear) {
/* Generic clear doesn't go through CCU (or other caches). */
cmd->state.cache.flush_bits |= TU_CMD_FLAG_CCU_INVALIDATE_COLOR |
TU_CMD_FLAG_CCU_INVALIDATE_DEPTH |
@ -3813,6 +3822,13 @@ tu_CmdClearDepthStencilImage(VkCommandBuffer commandBuffer,
}
tu_emit_resolve_group<CHIP>(cmd, &cmd->cs, &resolve_group);
if (use_generic_clear) {
/* This will emit CCU_RESOLVE_CLEAN which will ensure any future resolves
* proceed only after the just-emitted generic clears are complete.
*/
cmd->state.cache.flush_bits |= TU_CMD_FLAG_BLIT_CACHE_CLEAN;
tu_emit_cache_flush<CHIP>(cmd);
}
tu_lrz_clear_depth_image<CHIP>(cmd, image, pDepthStencil, rangeCount, pRanges);
}