diff --git a/src/gallium/drivers/iris/iris_state.c b/src/gallium/drivers/iris/iris_state.c index b1b5ec5965e..b81d9798ec5 100644 --- a/src/gallium/drivers/iris/iris_state.c +++ b/src/gallium/drivers/iris/iris_state.c @@ -2996,12 +2996,15 @@ fill_surface_state(struct isl_device *isl_dev, if (aux_usage != ISL_AUX_USAGE_NONE) { f.aux_surf = &res->aux.surf; f.aux_usage = aux_usage; - f.clear_color = res->aux.clear_color; + if (aux_usage == ISL_AUX_USAGE_MC) { + f.aux_format = iris_format_for_usage(isl_dev->info, + res->external_format, + surf->usage).fmt; + } else { + f.aux_format = surf->format; + } - if (aux_usage == ISL_AUX_USAGE_MC) - f.mc_format = iris_format_for_usage(isl_dev->info, - res->external_format, - surf->usage).fmt; + f.clear_color = res->aux.clear_color; if (res->aux.bo) f.aux_address = res->aux.bo->address + res->aux.offset; diff --git a/src/intel/blorp/blorp.c b/src/intel/blorp/blorp.c index 05b12a0204d..fa63f93c722 100644 --- a/src/intel/blorp/blorp.c +++ b/src/intel/blorp/blorp.c @@ -166,6 +166,7 @@ blorp_surface_info_init(struct blorp_batch *batch, info->addr = surf->addr; info->aux_usage = surf->aux_usage; + info->aux_format = surf->surf->format; if (!blorp_address_is_null(surf->aux_addr)) { info->aux_surf = *surf->aux_surf; info->aux_addr = surf->aux_addr; diff --git a/src/intel/blorp/blorp_genX_exec_brw.h b/src/intel/blorp/blorp_genX_exec_brw.h index 2adef818a15..f283087cb71 100644 --- a/src/intel/blorp/blorp_genX_exec_brw.h +++ b/src/intel/blorp/blorp_genX_exec_brw.h @@ -1239,6 +1239,7 @@ blorp_emit_surface_state(struct blorp_batch *batch, isl_surf_fill_state(batch->blorp->isl_dev, state, .surf = &surf, .view = &surface->view, .aux_surf = &surface->aux_surf, .aux_usage = aux_usage, + .aux_format = surface->aux_format, .address = blorp_get_surface_address(batch, surface->addr), .aux_address = !use_aux_address ? 0 : @@ -2134,7 +2135,7 @@ blorp_xy_block_copy_blt(struct blorp_batch *batch, blt.DestinationCompressionEnable = true; #endif blt.DestinationCompressionFormat = - isl_get_render_compression_format(dst_surf->format); + isl_get_render_compression_format(params->dst.aux_format); blt.DestinationClearValueEnable = !!params->dst.clear_color_addr.buffer; blt.DestinationClearAddress = params->dst.clear_color_addr; } @@ -2180,7 +2181,7 @@ blorp_xy_block_copy_blt(struct blorp_batch *batch, blt.SourceCompressionEnable = true; #endif blt.SourceCompressionFormat = - isl_get_render_compression_format(src_surf->format); + isl_get_render_compression_format(params->src.aux_format); blt.SourceClearValueEnable = !!params->src.clear_color_addr.buffer; blt.SourceClearAddress = params->src.clear_color_addr; } @@ -2278,7 +2279,7 @@ blorp_xy_fast_color_blit(struct blorp_batch *batch, blt.DestinationClearAddress = params->dst.clear_color_addr; #endif blt.DestinationCompressionFormat = - isl_get_render_compression_format(dst_surf->format); + isl_get_render_compression_format(params->dst.aux_format); } #endif } diff --git a/src/intel/blorp/blorp_priv.h b/src/intel/blorp/blorp_priv.h index 9eb720c8189..db86f0cbc02 100644 --- a/src/intel/blorp/blorp_priv.h +++ b/src/intel/blorp/blorp_priv.h @@ -90,6 +90,7 @@ struct blorp_surface_info struct isl_surf aux_surf; struct blorp_address aux_addr; enum isl_aux_usage aux_usage; + enum isl_format aux_format; union isl_color_value clear_color; struct blorp_address clear_color_addr; diff --git a/src/intel/isl/isl.h b/src/intel/isl/isl.h index 2b635637049..4d32062b3c7 100644 --- a/src/intel/isl/isl.h +++ b/src/intel/isl/isl.h @@ -1854,11 +1854,11 @@ struct isl_surf_fill_state_info { uint64_t aux_address; /** - * The format to use for decoding media compression. + * The format to use for encoding and decoding render/media compression. * - * Used together with the surface format. + * May be used together with the surface format. */ - enum isl_format mc_format; + enum isl_format aux_format; /** * The clear color for this surface diff --git a/src/intel/isl/isl_surface_state.c b/src/intel/isl/isl_surface_state.c index 5e667301b13..a0e17646816 100644 --- a/src/intel/isl/isl_surface_state.c +++ b/src/intel/isl/isl_surface_state.c @@ -803,15 +803,16 @@ isl_genX(surf_fill_state_s)(const struct isl_device *dev, void *state, if (info->view->usage & (ISL_SURF_USAGE_RENDER_TARGET_BIT | ISL_SURF_USAGE_STORAGE_BIT)) { s.CompressionFormat = - isl_get_render_compression_format(info->surf->format); + isl_get_render_compression_format(info->aux_format); } #elif GFX_VERx10 == 125 if (info->aux_usage == ISL_AUX_USAGE_MC) { s.CompressionFormat = - get_media_compression_format(info->mc_format, info->surf->format); + get_media_compression_format(info->aux_format, + info->surf->format); } else { s.CompressionFormat = - isl_get_render_compression_format(info->surf->format); + isl_get_render_compression_format(info->aux_format); } #endif #if GFX_VER == 12 @@ -835,7 +836,7 @@ isl_genX(surf_fill_state_s)(const struct isl_device *dev, void *state, * cases. */ s.DecompressInL3 = - !isl_formats_have_same_bits_per_channel(info->surf->format, + !isl_formats_have_same_bits_per_channel(info->aux_format, info->view->format); #endif #if GFX_VER >= 9 diff --git a/src/intel/vulkan/anv_image_view.c b/src/intel/vulkan/anv_image_view.c index f2566486d3b..b284a7f9f89 100644 --- a/src/intel/vulkan/anv_image_view.c +++ b/src/intel/vulkan/anv_image_view.c @@ -118,6 +118,7 @@ anv_image_fill_surface_state(struct anv_device *device, .clear_color = *clear_color, .aux_surf = &aux_surface->isl, .aux_usage = aux_usage, + .aux_format = isl_surf->format, .aux_address = anv_address_physical(aux_address), .clear_address = anv_address_physical(clear_address), .use_clear_address =