From 27c5b93d37a32ca027ca89d655ec88c2a70b188d Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Tapani=20P=C3=A4lli?= <tapani.palli@intel.com>
Date: Wed, 11 May 2022 13:10:07 +0300
Subject: [PATCH] iris: disable preemption on VFG, Wa_14015207028 for DG2
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This workaround disables batch level preemption for Polygon,
Trifan and Lineloop primitive topologies.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18456>
---
 src/gallium/drivers/iris/iris_state.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/src/gallium/drivers/iris/iris_state.c b/src/gallium/drivers/iris/iris_state.c
index f426623a586..07d3c723bc9 100644
--- a/src/gallium/drivers/iris/iris_state.c
+++ b/src/gallium/drivers/iris/iris_state.c
@@ -1058,6 +1058,14 @@ iris_init_render_context(struct iris_batch *batch)
 
    iris_init_common_context(batch);
 
+#if GFX_VERx10 == 125
+   /* Wa_14015207028 */
+   iris_emit_reg(batch, GENX(VFG_PREEMPTION_CHICKEN_BITS), vfgc) {
+      vfgc.PolygonTrifanLineLoopPreemptionDisable = true;
+      vfgc.PolygonTrifanLineLoopPreemptionDisableMask = true;
+   };
+#endif
+
 #if GFX_VER >= 9
    iris_emit_reg(batch, GENX(CS_DEBUG_MODE2), reg) {
       reg.CONSTANT_BUFFERAddressOffsetDisable = true;