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radv: remove most fields from radv_physical_device_cache_key

Browse source 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41022>
This commit is contained in:
Rhys Perry 2026-04-23 16:49:00 +01:00 • committed by Marge Bot
parent 9ad0cd7e38
commit 27815719aa
6 changed files with 27 additions and 86 deletions
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2
src/amd/vulkan/radv_buffer.c
View file

@ -272,7 +272,7 @@ radv_bo_create(struct radv_device *device, struct vk_object_base *object, uint64
/* Pad the BO with an extra VM page to mitigate OOB access from SMEM instructions.
* This doesn't allocate extra memory, just writes an extra page table entry.
*/
if (pdev->cache_key.mitigate_smem_oob && !is_internal)
if (device->compiler_info.key.mitigate_smem_oob && !is_internal)
flags |= RADEON_FLAG_VM_PAD_1PAGE;
result = ws->buffer_create(ws, size, alignment, domain, flags, priority, address, out_bo);

45
src/amd/vulkan/radv_device.c
View file

@ -1135,9 +1135,7 @@ radv_device_init_compiler_info(struct radv_device *device)
if (instance->debug_flags & RADV_DEBUG_DUMP_CS)
dump_shaders |= VK_SHADER_STAGE_COMPUTE_BIT | RADV_RT_STAGE_BITS;
const struct radv_physical_device_cache_key *pdev_key = &pdev->cache_key;
if (pdev_key->use_ngg_culling) {
if (pdev->use_ngg_culling) {
/* Shader based culling efficiency can depend on PS throughput.
* Estimate an upper limit for PS input param count based on GPU info.
*/
@ -1159,9 +1157,9 @@ radv_device_init_compiler_info(struct radv_device *device)
/* Shader features */
.use_llvm = pdev->use_llvm,
.use_ngg = pdev->use_ngg,
.use_ngg_culling = pdev_key->use_ngg_culling,
.use_ngg_culling = pdev->use_ngg_culling,
.nggc_max_ps_params = nggc_max_ps_params,
.no_ngg_gs = pdev_key->no_ngg_gs,
.no_ngg_gs = instance->drirc.performance.disable_ngg_gs,
.load_grid_size_from_user_sgpr = pdev->load_grid_size_from_user_sgpr,
.emulate_ngg_gs_query_pipeline_stat = pdev->emulate_ngg_gs_query_pipeline_stat,
.primitives_generated_query = device->cache_key.primitives_generated_query,
@ -1170,23 +1168,24 @@ radv_device_init_compiler_info(struct radv_device *device)
.use_fmask = pdev->use_fmask,
.robust_buffer_access = pdev->use_llvm && (device->vk.enabled_features.robustBufferAccess2 ||
device->vk.enabled_features.robustBufferAccess),
.mitigate_smem_oob = pdev_key->mitigate_smem_oob,
.bvh8 = pdev_key->bvh8,
.no_rt = pdev_key->no_rt,
.rt_cps = pdev_key->rt_cps,
.clear_lds = pdev_key->clear_lds,
.disable_aniso_single_level = pdev_key->disable_aniso_single_level,
.disable_shrink_image_store = pdev_key->disable_shrink_image_store,
.disable_sinking_load_input_fs = pdev_key->disable_sinking_load_input_fs,
.disable_trunc_coord = pdev_key->disable_trunc_coord,
.enable_mrt_output_nan_fixup = pdev_key->enable_mrt_output_nan_fixup,
.emulate_rt = pdev_key->emulate_rt,
.invariant_geom = pdev_key->invariant_geom,
.split_fma = pdev_key->split_fma,
.ssbo_non_uniform = pdev_key->ssbo_non_uniform,
.tex_non_uniform = pdev_key->tex_non_uniform,
.lower_terminate_to_discard = pdev_key->lower_terminate_to_discard,
.no_implicit_varying_subgroup_size = pdev_key->no_implicit_varying_subgroup_size,
.mitigate_smem_oob = pdev->info.compiler_info.has_smem_oob_access_bug &&
!(instance->debug_flags & RADV_DEBUG_NO_SMEM_MITIGATION),
.bvh8 = radv_use_bvh8(pdev),
.no_rt = !!(instance->debug_flags & RADV_DEBUG_NO_RT),
.rt_cps = !!(instance->perftest_flags & RADV_PERFTEST_RT_CPS),
.clear_lds = instance->drirc.misc.clear_lds,
.disable_aniso_single_level = instance->drirc.debug.disable_aniso_single_level,
.disable_shrink_image_store = instance->drirc.debug.disable_shrink_image_store,
.disable_sinking_load_input_fs = instance->drirc.debug.disable_sinking_load_input_fs,
.disable_trunc_coord = instance->drirc.debug.disable_trunc_coord,
.enable_mrt_output_nan_fixup = instance->drirc.debug.enable_mrt_output_nan_fixup,
.emulate_rt = radv_emulate_rt(pdev),
.invariant_geom = instance->drirc.debug.invariant_geom,
.split_fma = instance->drirc.debug.split_fma,
.ssbo_non_uniform = instance->drirc.debug.ssbo_non_uniform,
.tex_non_uniform = instance->drirc.debug.tex_non_uniform,
.lower_terminate_to_discard = instance->drirc.debug.lower_terminate_to_discard,
.no_implicit_varying_subgroup_size = instance->drirc.debug.no_implicit_varying_subgroup_size,
.force_aniso = device->force_aniso,
/* Wave/subgroup sizes */
@ -1568,7 +1567,7 @@ radv_CreateDevice(VkPhysicalDevice physicalDevice, const VkDeviceCreateInfo *pCr
device->vk.enabled_features.extendedDynamicState3ColorBlendEquation)
radv_shader_part_cache_init(&device->ps_epilogs, &ps_epilog_ops);
if (pdev->info.has_zero_index_buffer_bug || pdev->cache_key.mitigate_smem_oob) {
if (pdev->info.has_zero_index_buffer_bug || device->compiler_info.key.mitigate_smem_oob) {
result = radv_bo_create(device, NULL, 4096, 4096, RADEON_DOMAIN_VRAM,
RADEON_FLAG_NO_CPU_ACCESS | RADEON_FLAG_NO_INTERPROCESS_SHARING | RADEON_FLAG_READ_ONLY |
RADEON_FLAG_ZERO_VRAM | RADEON_FLAG_32BIT,

29
src/amd/vulkan/radv_physical_device.c
View file

@ -294,40 +294,11 @@ radv_physical_device_init_cache_key(struct radv_physical_device *pdev)
STATIC_ASSERT(sizeof(enum radeon_family) == 4);
STATIC_ASSERT(sizeof(struct radv_physical_device_cache_key) == 12);
const struct radv_instance *instance = radv_physical_device_instance(pdev);
struct radv_physical_device_cache_key *key = &pdev->cache_key;
key->family = pdev->info.family;
key->ptr_size = sizeof(void *);
key->conformant_trunc_coord = pdev->info.compiler_info.conformant_trunc_coord;
key->clear_lds = instance->drirc.misc.clear_lds;
key->cs_wave32 = pdev->cs_wave_size == 32;
key->disable_aniso_single_level = instance->drirc.debug.disable_aniso_single_level;
key->disable_shrink_image_store = instance->drirc.debug.disable_shrink_image_store;
key->disable_sinking_load_input_fs = instance->drirc.debug.disable_sinking_load_input_fs;
key->disable_trunc_coord = instance->drirc.debug.disable_trunc_coord;
key->enable_mrt_output_nan_fixup = instance->drirc.debug.enable_mrt_output_nan_fixup;
key->emulate_rt = radv_emulate_rt(pdev);
key->bvh8 = radv_use_bvh8(pdev);
key->ge_wave32 = pdev->ge_wave_size == 32;
key->invariant_geom = instance->drirc.debug.invariant_geom;
key->no_fmask = !!(instance->debug_flags & RADV_DEBUG_NO_FMASK);
key->no_ngg_gs = instance->drirc.performance.disable_ngg_gs;
key->no_rt = !!(instance->debug_flags & RADV_DEBUG_NO_RT);
key->ps_wave32 = pdev->ps_wave_size == 32;
key->rt_wave64 = pdev->rt_wave_size == 64;
key->split_fma = instance->drirc.debug.split_fma;
key->ssbo_non_uniform = instance->drirc.debug.ssbo_non_uniform;
key->tex_non_uniform = instance->drirc.debug.tex_non_uniform;
key->lower_terminate_to_discard = instance->drirc.debug.lower_terminate_to_discard;
key->use_llvm = pdev->use_llvm;
key->use_ngg = pdev->use_ngg;
key->use_ngg_culling = pdev->use_ngg_culling;
key->no_implicit_varying_subgroup_size = instance->drirc.debug.no_implicit_varying_subgroup_size;
key->mitigate_smem_oob =
pdev->info.compiler_info.has_smem_oob_access_bug && !(instance->debug_flags & RADV_DEBUG_NO_SMEM_MITIGATION);
key->rt_cps = !!(instance->perftest_flags & RADV_PERFTEST_RT_CPS);
}
static int

30
src/amd/vulkan/radv_physical_device.h
View file

@ -39,36 +39,8 @@ struct radv_binning_settings {
struct radv_physical_device_cache_key {
enum radeon_family family;
uint32_t ptr_size;
uint32_t conformant_trunc_coord : 1;
uint32_t clear_lds : 1;
uint32_t cs_wave32 : 1;
uint32_t disable_aniso_single_level : 1;
uint32_t disable_shrink_image_store : 1;
uint32_t disable_sinking_load_input_fs : 1;
uint32_t disable_trunc_coord : 1;
uint32_t enable_mrt_output_nan_fixup : 1;
uint32_t emulate_rt : 1;
uint32_t bvh8 : 1;
uint32_t ge_wave32 : 1;
uint32_t invariant_geom : 1;
uint32_t no_fmask : 1;
uint32_t no_ngg_gs : 1;
uint32_t no_rt : 1;
uint32_t ps_wave32 : 1;
uint32_t rt_wave64 : 1;
uint32_t split_fma : 1;
uint32_t ssbo_non_uniform : 1;
uint32_t tex_non_uniform : 1;
uint32_t lower_terminate_to_discard : 1;
uint32_t use_llvm : 1;
uint32_t use_ngg : 1;
uint32_t use_ngg_culling : 1;
uint32_t no_implicit_varying_subgroup_size : 1;
uint32_t mitigate_smem_oob : 1;
uint32_t rt_cps : 1;
uint32_t reserved : 5;
uint32_t reserved : 31;
};
enum radv_video_enc_hw_ver {

3
src/amd/vulkan/radv_pipeline_rt.c
View file

@ -689,7 +689,6 @@ radv_rt_compile_shaders(struct radv_device *device, struct vk_pipeline_cache *ca
const struct radv_shader_stage_key *stage_keys, struct radv_ray_tracing_pipeline *pipeline,
struct radv_serialized_shader_arena_block *capture_replay_handles, bool skip_shaders_cache)
{
const struct radv_physical_device *pdev = radv_device_physical(device);
VK_FROM_HANDLE(radv_pipeline_layout, pipeline_layout, pCreateInfo->layout);
if (pipeline->base.base.create_flags & VK_PIPELINE_CREATE_2_FAIL_ON_PIPELINE_COMPILE_REQUIRED_BIT)
@ -749,7 +748,7 @@ radv_rt_compile_shaders(struct radv_device *device, struct vk_pipeline_cache *ca
}
enum radv_rt_lowering_mode recursive_lowering_mode =
pdev->cache_key.rt_cps ? RADV_RT_LOWERING_MODE_CPS : RADV_RT_LOWERING_MODE_FUNCTION_CALLS;
device->compiler_info.key.rt_cps ? RADV_RT_LOWERING_MODE_CPS : RADV_RT_LOWERING_MODE_FUNCTION_CALLS;
enum radv_rt_lowering_mode raygen_lowering_mode;
if (can_use_monolithic)

4
src/amd/vulkan/radv_queue.c
View file

@ -481,7 +481,7 @@ radv_emit_compute_scratch(struct radv_device *device, struct radv_cmd_stream *cs
uint32_t rsrc1;
/* Ensure there is always a mapped BO in s[0:1] for the SMEM OOB mitigation */
if (!compute_scratch_bo && pdev->cache_key.mitigate_smem_oob)
if (!compute_scratch_bo && device->compiler_info.key.mitigate_smem_oob)
compute_scratch_bo = device->zero_bo;
if (!compute_scratch_bo)
@ -544,7 +544,7 @@ radv_emit_graphics_shader_pointers(struct radv_device *device, struct radv_cmd_s
uint64_t va;
/* Ensure there is always a mapped BO in s[0:1] for the SMEM OOB mitigation */
if (!descriptor_bo && pdev->cache_key.mitigate_smem_oob)
if (!descriptor_bo && device->compiler_info.key.mitigate_smem_oob)
descriptor_bo = device->zero_bo;
if (!descriptor_bo)