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broadcom/compiler: validate restrictions after TLB Z write

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Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
This commit is contained in:
Iago Toral Quiroga 2021-11-25 13:00:34 +01:00 • committed by Marge Bot
parent d4285d7f2a
commit 2774601780
1 changed files with 28 additions and 0 deletions
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28
src/broadcom/compiler/qpu_validate.c
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@ -41,6 +41,7 @@ struct v3d_qpu_validate_state {
int last_sfu_write;
int last_branch_ip;
int last_thrsw_ip;
int first_tlb_z_write;
/* Set when we've found the last-THRSW signal, or if we were started
* in single-segment mode.
@ -110,11 +111,37 @@ static void
qpu_validate_inst(struct v3d_qpu_validate_state *state, struct qinst *qinst)
{
const struct v3d_device_info *devinfo = state->c->devinfo;
if (qinst->is_tlb_z_write && state->ip < state->first_tlb_z_write)
state->first_tlb_z_write = state->ip;
const struct v3d_qpu_instr *inst = &qinst->qpu;
if (inst->type == V3D_QPU_INSTR_TYPE_BRANCH &&
state->first_tlb_z_write >= 0 &&
state->ip > state->first_tlb_z_write &&
inst->branch.msfign != V3D_QPU_MSFIGN_NONE &&
inst->branch.cond != V3D_QPU_BRANCH_COND_ALWAYS &&
inst->branch.cond != V3D_QPU_BRANCH_COND_A0 &&
inst->branch.cond != V3D_QPU_BRANCH_COND_NA0) {
fail_instr(state, "Implicit branch MSF read after TLB Z write");
}
if (inst->type != V3D_QPU_INSTR_TYPE_ALU)
return;
if (inst->alu.add.op == V3D_QPU_A_SETMSF &&
state->first_tlb_z_write >= 0 &&
state->ip > state->first_tlb_z_write) {
fail_instr(state, "SETMSF after TLB Z write");
}
if (state->first_tlb_z_write >= 0 &&
state->ip > state->first_tlb_z_write &&
inst->alu.add.op == V3D_QPU_A_MSF) {
fail_instr(state, "MSF read after TLB Z write");
}
if (devinfo->ver < 71) {
if (inst->sig.small_imm_a || inst->sig.small_imm_c ||
inst->sig.small_imm_d) {
@ -348,6 +375,7 @@ qpu_validate(struct v3d_compile *c)
.last_sfu_write = -10,
.last_thrsw_ip = -10,
.last_branch_ip = -10,
.first_tlb_z_write = INT_MAX,
.ip = 0,
.last_thrsw_found = !c->last_thrsw,