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gallium/radeon: always flush asynchronously and wait after begin_new_cs
This hides the overhead of everything in the driver after the CS flush and before returning from pipe_context::flush. Only microbenchmarks will benefit. +2% FPS for glxgears. Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
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parent
f05f0bb5cb
commit
2769dadb0f
2 changed files with 11 additions and 4 deletions
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@ -366,15 +366,13 @@ static void r600_flush_from_st(struct pipe_context *ctx,
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struct pipe_screen *screen = ctx->screen;
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struct r600_common_context *rctx = (struct r600_common_context *)ctx;
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struct radeon_winsys *ws = rctx->ws;
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unsigned rflags = 0;
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struct pipe_fence_handle *gfx_fence = NULL;
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struct pipe_fence_handle *sdma_fence = NULL;
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bool deferred_fence = false;
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unsigned rflags = RADEON_FLUSH_ASYNC;
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if (flags & PIPE_FLUSH_END_OF_FRAME)
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rflags |= RADEON_FLUSH_END_OF_FRAME;
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if (flags & PIPE_FLUSH_DEFERRED)
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rflags |= RADEON_FLUSH_ASYNC;
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/* DMA IBs are preambles to gfx IBs, therefore must be flushed first. */
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if (rctx->dma.cs)
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@ -383,7 +381,7 @@ static void r600_flush_from_st(struct pipe_context *ctx,
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if (!radeon_emitted(rctx->gfx.cs, rctx->initial_gfx_cs_size)) {
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if (fence)
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ws->fence_reference(&gfx_fence, rctx->last_gfx_fence);
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if (!(rflags & RADEON_FLUSH_ASYNC))
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if (!(flags & PIPE_FLUSH_DEFERRED))
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ws->cs_sync_flush(rctx->gfx.cs);
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} else {
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/* Instead of flushing, create a deferred fence. Constraints:
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@ -419,6 +417,12 @@ static void r600_flush_from_st(struct pipe_context *ctx,
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screen->fence_reference(screen, fence, NULL);
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*fence = (struct pipe_fence_handle*)multi_fence;
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}
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if (!(flags & PIPE_FLUSH_DEFERRED)) {
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if (rctx->dma.cs)
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ws->cs_sync_flush(rctx->dma.cs);
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ws->cs_sync_flush(rctx->gfx.cs);
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}
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}
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static void r600_flush_dma_ring(void *ctx, unsigned flags,
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@ -108,6 +108,9 @@ void si_context_gfx_flush(void *context, unsigned flags,
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if (r600_check_device_reset(&ctx->b))
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return;
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if (ctx->screen->b.debug_flags & DBG_CHECK_VM)
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flags &= ~RADEON_FLUSH_ASYNC;
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/* If the state tracker is flushing the GFX IB, r600_flush_from_st is
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* responsible for flushing the DMA IB and merging the fences from both.
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* This code is only needed when the driver flushes the GFX IB
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