r600g: introduce r600_bc_src_set_abs helper and fix LOG

LOG instruction should use absolute values of source operand.

Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
This commit is contained in:
Vadim Girlin 2011-07-08 06:19:36 +04:00 committed by Alex Deucher
parent 57fe695a17
commit 270de51f1d

View file

@ -939,6 +939,12 @@ static void r600_bc_src(struct r600_bc_alu_src *bc_src,
bc_src->value = shader_src->value[bc_src->chan];
}
static void r600_bc_src_set_abs(struct r600_bc_alu_src *bc_src)
{
bc_src->abs = 1;
bc_src->neg = 0;
}
static void tgsi_dst(struct r600_shader_ctx *ctx,
const struct tgsi_full_dst_register *tgsi_dst,
unsigned swizzle,
@ -998,9 +1004,7 @@ static int tgsi_op2_s(struct r600_shader_ctx *ctx, int swap)
alu.src[1].neg = 1;
break;
case TGSI_OPCODE_ABS:
alu.src[0].abs = 1;
if (alu.src[0].neg)
alu.src[0].neg = 0;
r600_bc_src_set_abs(&alu.src[0]);
break;
default:
break;
@ -1505,8 +1509,7 @@ static int tgsi_rsq(struct r600_shader_ctx *ctx)
for (i = 0; i < inst->Instruction.NumSrcRegs; i++) {
r600_bc_src(&alu.src[i], &ctx->src[i], 0);
alu.src[i].abs = 1;
alu.src[i].neg = 0;
r600_bc_src_set_abs(&alu.src[i]);
}
alu.dst.sel = ctx->temp_reg;
alu.dst.write = 1;
@ -2489,7 +2492,7 @@ static int tgsi_log(struct r600_shader_ctx *ctx)
int r;
int i;
/* result.x = floor(log2(src)); */
/* result.x = floor(log2(|src|)); */
if (inst->Dst[0].Register.WriteMask & 1) {
if (ctx->bc->chiprev == CHIPREV_CAYMAN) {
for (i = 0; i < 3; i++) {
@ -2497,6 +2500,7 @@ static int tgsi_log(struct r600_shader_ctx *ctx)
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_IEEE);
r600_bc_src(&alu.src[0], &ctx->src[0], 0);
r600_bc_src_set_abs(&alu.src[0]);
alu.dst.sel = ctx->temp_reg;
alu.dst.chan = i;
@ -2514,6 +2518,7 @@ static int tgsi_log(struct r600_shader_ctx *ctx)
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_IEEE);
r600_bc_src(&alu.src[0], &ctx->src[0], 0);
r600_bc_src_set_abs(&alu.src[0]);
alu.dst.sel = ctx->temp_reg;
alu.dst.chan = 0;
@ -2538,7 +2543,7 @@ static int tgsi_log(struct r600_shader_ctx *ctx)
return r;
}
/* result.y = src.x / (2 ^ floor(log2(src.x))); */
/* result.y = |src.x| / (2 ^ floor(log2(|src.x|))); */
if ((inst->Dst[0].Register.WriteMask >> 1) & 1) {
if (ctx->bc->chiprev == CHIPREV_CAYMAN) {
@ -2547,6 +2552,7 @@ static int tgsi_log(struct r600_shader_ctx *ctx)
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_IEEE);
r600_bc_src(&alu.src[0], &ctx->src[0], 0);
r600_bc_src_set_abs(&alu.src[0]);
alu.dst.sel = ctx->temp_reg;
alu.dst.chan = i;
@ -2564,6 +2570,7 @@ static int tgsi_log(struct r600_shader_ctx *ctx)
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_IEEE);
r600_bc_src(&alu.src[0], &ctx->src[0], 0);
r600_bc_src_set_abs(&alu.src[0]);
alu.dst.sel = ctx->temp_reg;
alu.dst.chan = 1;
@ -2663,6 +2670,7 @@ static int tgsi_log(struct r600_shader_ctx *ctx)
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_MUL);
r600_bc_src(&alu.src[0], &ctx->src[0], 0);
r600_bc_src_set_abs(&alu.src[0]);
alu.src[1].sel = ctx->temp_reg;
alu.src[1].chan = 1;
@ -2677,7 +2685,7 @@ static int tgsi_log(struct r600_shader_ctx *ctx)
return r;
}
/* result.z = log2(src);*/
/* result.z = log2(|src|);*/
if ((inst->Dst[0].Register.WriteMask >> 2) & 1) {
if (ctx->bc->chiprev == CHIPREV_CAYMAN) {
for (i = 0; i < 3; i++) {
@ -2685,6 +2693,7 @@ static int tgsi_log(struct r600_shader_ctx *ctx)
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_IEEE);
r600_bc_src(&alu.src[0], &ctx->src[0], 0);
r600_bc_src_set_abs(&alu.src[0]);
alu.dst.sel = ctx->temp_reg;
if (i == 2)
@ -2702,6 +2711,7 @@ static int tgsi_log(struct r600_shader_ctx *ctx)
alu.inst = CTX_INST(V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_LOG_IEEE);
r600_bc_src(&alu.src[0], &ctx->src[0], 0);
r600_bc_src_set_abs(&alu.src[0]);
alu.dst.sel = ctx->temp_reg;
alu.dst.write = 1;