diff --git a/docs/gallium/screen.rst b/docs/gallium/screen.rst index 808afec859a..71239a5bc56 100644 --- a/docs/gallium/screen.rst +++ b/docs/gallium/screen.rst @@ -735,10 +735,6 @@ MOV OUT[0], CONST[0][3] # copy vector 3 of constbuf 0 * ``PIPE_SHADER_CAP_LDEXP_SUPPORTED``: Whether LDEXP is supported. * ``PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE``: Whether the driver doesn't ignore tgsi_declaration_range::Last for shader inputs and outputs. -* ``PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT``: This is the maximum number - of iterations that loops are allowed to have to be unrolled. It is only - a hint to gallium frontends. Whether any loops will be unrolled is not - guaranteed. * ``PIPE_SHADER_CAP_MAX_SHADER_BUFFERS``: Maximum number of memory buffers (also used to implement atomic counters). Having this be non-0 also implies support for the ``LOAD``, ``STORE``, and ``ATOM*`` TGSI diff --git a/src/gallium/auxiliary/gallivm/lp_bld_limits.h b/src/gallium/auxiliary/gallivm/lp_bld_limits.h index e2a440e81c6..312b7410604 100644 --- a/src/gallium/auxiliary/gallivm/lp_bld_limits.h +++ b/src/gallium/auxiliary/gallivm/lp_bld_limits.h @@ -157,7 +157,6 @@ gallivm_get_shader_param(enum pipe_shader_cap param) case PIPE_SHADER_CAP_LDEXP_SUPPORTED: case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS: case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS: - case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT: return 0; case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS: return LP_MAX_TGSI_SHADER_BUFFERS; diff --git a/src/gallium/auxiliary/tgsi/tgsi_exec.h b/src/gallium/auxiliary/tgsi/tgsi_exec.h index bd3de6978ae..253a53cd030 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_exec.h +++ b/src/gallium/auxiliary/tgsi/tgsi_exec.h @@ -469,7 +469,6 @@ tgsi_exec_get_shader_param(enum pipe_shader_cap param) case PIPE_SHADER_CAP_FP16_CONST_BUFFERS: case PIPE_SHADER_CAP_INT16: case PIPE_SHADER_CAP_GLSL_16BIT_CONSTS: - case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT: return 0; case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS: return PIPE_MAX_SAMPLERS; diff --git a/src/gallium/drivers/asahi/agx_pipe.c b/src/gallium/drivers/asahi/agx_pipe.c index c64bf396f85..90d48055ca8 100644 --- a/src/gallium/drivers/asahi/agx_pipe.c +++ b/src/gallium/drivers/asahi/agx_pipe.c @@ -981,7 +981,6 @@ agx_get_shader_param(struct pipe_screen* pscreen, case PIPE_SHADER_CAP_SUPPORTED_IRS: return (1 << PIPE_SHADER_IR_NIR) | (1 << PIPE_SHADER_IR_NIR_SERIALIZED); - case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT: case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS: case PIPE_SHADER_CAP_MAX_SHADER_IMAGES: case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS: diff --git a/src/gallium/drivers/crocus/crocus_screen.c b/src/gallium/drivers/crocus/crocus_screen.c index 2c0e82d3ec8..9d36107cf01 100644 --- a/src/gallium/drivers/crocus/crocus_screen.c +++ b/src/gallium/drivers/crocus/crocus_screen.c @@ -526,7 +526,6 @@ crocus_get_shader_param(struct pipe_screen *pscreen, case PIPE_SHADER_CAP_DFRACEXP_DLDEXP_SUPPORTED: case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE: case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED: - case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT: case PIPE_SHADER_CAP_FP16_DERIVATIVES: case PIPE_SHADER_CAP_INT16: case PIPE_SHADER_CAP_GLSL_16BIT_CONSTS: diff --git a/src/gallium/drivers/d3d12/d3d12_screen.cpp b/src/gallium/drivers/d3d12/d3d12_screen.cpp index 2b7dd3aae71..697dd76f81e 100644 --- a/src/gallium/drivers/d3d12/d3d12_screen.cpp +++ b/src/gallium/drivers/d3d12/d3d12_screen.cpp @@ -483,7 +483,6 @@ d3d12_get_shader_param(struct pipe_screen *pscreen, screen->opts.ResourceBindingTier >= D3D12_RESOURCE_BINDING_TIER_3) ? PIPE_MAX_SHADER_IMAGES : D3D12_PS_CS_UAV_REGISTER_COUNT; - case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT: case PIPE_SHADER_CAP_LDEXP_SUPPORTED: case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS: case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS: diff --git a/src/gallium/drivers/etnaviv/etnaviv_screen.c b/src/gallium/drivers/etnaviv/etnaviv_screen.c index c32fec17e4e..bf8c989d95b 100644 --- a/src/gallium/drivers/etnaviv/etnaviv_screen.c +++ b/src/gallium/drivers/etnaviv/etnaviv_screen.c @@ -414,7 +414,6 @@ etna_screen_get_shader_param(struct pipe_screen *pscreen, case PIPE_SHADER_CAP_SUPPORTED_IRS: return (1 << PIPE_SHADER_IR_TGSI) | (1 << PIPE_SHADER_IR_NIR); - case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT: case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS: case PIPE_SHADER_CAP_MAX_SHADER_IMAGES: case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS: diff --git a/src/gallium/drivers/freedreno/freedreno_screen.c b/src/gallium/drivers/freedreno/freedreno_screen.c index cc1e0d4f7d6..b698bd64844 100644 --- a/src/gallium/drivers/freedreno/freedreno_screen.c +++ b/src/gallium/drivers/freedreno/freedreno_screen.c @@ -649,7 +649,6 @@ fd_screen_get_shader_param(struct pipe_screen *pscreen, case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE: case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS: case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS: - case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT: return 0; case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED: return 1; diff --git a/src/gallium/drivers/i915/i915_screen.c b/src/gallium/drivers/i915/i915_screen.c index d6f3acb752a..659cf244939 100644 --- a/src/gallium/drivers/i915/i915_screen.c +++ b/src/gallium/drivers/i915/i915_screen.c @@ -370,7 +370,6 @@ i915_get_shader_param(struct pipe_screen *screen, enum pipe_shader_type shader, case PIPE_SHADER_CAP_MAX_SHADER_IMAGES: case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS: case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS: - case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT: return 0; default: diff --git a/src/gallium/drivers/iris/iris_screen.c b/src/gallium/drivers/iris/iris_screen.c index df0c9012991..79b17b39c5e 100644 --- a/src/gallium/drivers/iris/iris_screen.c +++ b/src/gallium/drivers/iris/iris_screen.c @@ -524,7 +524,6 @@ iris_get_shader_param(struct pipe_screen *pscreen, case PIPE_SHADER_CAP_DFRACEXP_DLDEXP_SUPPORTED: case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE: case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED: - case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT: return 0; default: unreachable("unknown shader param"); diff --git a/src/gallium/drivers/lima/lima_screen.c b/src/gallium/drivers/lima/lima_screen.c index 0ac69411c36..95f2481139f 100644 --- a/src/gallium/drivers/lima/lima_screen.c +++ b/src/gallium/drivers/lima/lima_screen.c @@ -238,9 +238,6 @@ get_vertex_shader_param(struct lima_screen *screen, case PIPE_SHADER_CAP_MAX_TEMPS: return 256; /* need investigate */ - case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT: - return 0; - default: return 0; } @@ -289,7 +286,6 @@ get_fragment_shader_param(struct lima_screen *screen, case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR: case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR: - case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT: return 0; default: diff --git a/src/gallium/drivers/nouveau/nv30/nv30_screen.c b/src/gallium/drivers/nouveau/nv30/nv30_screen.c index 21be946e2ca..792e1da3083 100644 --- a/src/gallium/drivers/nouveau/nv30/nv30_screen.c +++ b/src/gallium/drivers/nouveau/nv30/nv30_screen.c @@ -347,7 +347,6 @@ nv30_screen_get_shader_param(struct pipe_screen *pscreen, return (eng3d->oclass >= NV40_3D_CLASS) ? 32 : 13; case PIPE_SHADER_CAP_PREFERRED_IR: return (NOUVEAU_DEBUG & NOUVEAU_DEBUG_USE_TGSI) ? PIPE_SHADER_IR_TGSI : PIPE_SHADER_IR_NIR; - case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT: case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS: case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS: return 0; @@ -405,7 +404,6 @@ nv30_screen_get_shader_param(struct pipe_screen *pscreen, return 16; case PIPE_SHADER_CAP_PREFERRED_IR: return (NOUVEAU_DEBUG & NOUVEAU_DEBUG_USE_TGSI) ? PIPE_SHADER_IR_TGSI : PIPE_SHADER_IR_NIR; - case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT: case PIPE_SHADER_CAP_CONT_SUPPORTED: case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED: case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR: diff --git a/src/gallium/drivers/nouveau/nv50/nv50_screen.c b/src/gallium/drivers/nouveau/nv50/nv50_screen.c index 215a7bd4a9a..9c2ff9d8c62 100644 --- a/src/gallium/drivers/nouveau/nv50/nv50_screen.c +++ b/src/gallium/drivers/nouveau/nv50/nv50_screen.c @@ -517,7 +517,6 @@ nv50_screen_get_shader_param(struct pipe_screen *pscreen, return screen->prefer_nir ? PIPE_SHADER_IR_NIR : PIPE_SHADER_IR_TGSI; case PIPE_SHADER_CAP_SUPPORTED_IRS: return (1 << PIPE_SHADER_IR_TGSI) | (1 << PIPE_SHADER_IR_NIR); - case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT: case PIPE_SHADER_CAP_DROUND_SUPPORTED: case PIPE_SHADER_CAP_DFRACEXP_DLDEXP_SUPPORTED: case PIPE_SHADER_CAP_LDEXP_SUPPORTED: diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c index 2a1dbf0a70a..65e7dc66983 100644 --- a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c @@ -552,7 +552,6 @@ nvc0_screen_get_shader_param(struct pipe_screen *pscreen, case PIPE_SHADER_CAP_GLSL_16BIT_CONSTS: case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS: case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS: - case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT: return 0; case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS: return NVC0_MAX_BUFFERS; diff --git a/src/gallium/drivers/panfrost/pan_screen.c b/src/gallium/drivers/panfrost/pan_screen.c index 79a09818cda..5422c1900a5 100644 --- a/src/gallium/drivers/panfrost/pan_screen.c +++ b/src/gallium/drivers/panfrost/pan_screen.c @@ -457,7 +457,6 @@ panfrost_get_shader_param(struct pipe_screen *screen, case PIPE_SHADER_CAP_MAX_SHADER_IMAGES: return allow_side_effects ? PIPE_MAX_SHADER_IMAGES : 0; - case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT: case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS: case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS: return 0; diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c index 05c0ca28a63..2b51a8859ac 100644 --- a/src/gallium/drivers/r300/r300_screen.c +++ b/src/gallium/drivers/r300/r300_screen.c @@ -316,7 +316,6 @@ static int r300_get_shader_param(struct pipe_screen *pscreen, case PIPE_SHADER_CAP_MAX_SHADER_IMAGES: case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS: case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS: - case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT: return 0; default: break; @@ -408,7 +407,6 @@ static int r300_get_shader_param(struct pipe_screen *pscreen, case PIPE_SHADER_CAP_MAX_SHADER_IMAGES: case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS: case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS: - case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT: return 0; default: break; diff --git a/src/gallium/drivers/r600/r600_pipe.c b/src/gallium/drivers/r600/r600_pipe.c index 85e987fff3e..b7b557c4c2d 100644 --- a/src/gallium/drivers/r600/r600_pipe.c +++ b/src/gallium/drivers/r600/r600_pipe.c @@ -642,7 +642,6 @@ static int r600_get_shader_param(struct pipe_screen* pscreen, } return ir; } - case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT: case PIPE_SHADER_CAP_DROUND_SUPPORTED: case PIPE_SHADER_CAP_DFRACEXP_DLDEXP_SUPPORTED: case PIPE_SHADER_CAP_LDEXP_SUPPORTED: diff --git a/src/gallium/drivers/radeonsi/si_get.c b/src/gallium/drivers/radeonsi/si_get.c index 06ea8c5e535..ebae415aa07 100644 --- a/src/gallium/drivers/radeonsi/si_get.c +++ b/src/gallium/drivers/radeonsi/si_get.c @@ -441,8 +441,6 @@ static int si_get_shader_param(struct pipe_screen *pscreen, enum pipe_shader_typ return SI_NUM_SHADER_BUFFERS; case PIPE_SHADER_CAP_MAX_SHADER_IMAGES: return SI_NUM_IMAGES; - case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT: - return 0; case PIPE_SHADER_CAP_PREFERRED_IR: return PIPE_SHADER_IR_NIR; diff --git a/src/gallium/drivers/svga/svga_screen.c b/src/gallium/drivers/svga/svga_screen.c index 67ae0543612..fd765ba9254 100644 --- a/src/gallium/drivers/svga/svga_screen.c +++ b/src/gallium/drivers/svga/svga_screen.c @@ -554,7 +554,6 @@ vgpu9_get_shader_param(struct pipe_screen *screen, case PIPE_SHADER_CAP_MAX_SHADER_IMAGES: case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS: case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS: - case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT: return 0; } /* If we get here, we failed to handle a cap above */ @@ -621,7 +620,6 @@ vgpu9_get_shader_param(struct pipe_screen *screen, case PIPE_SHADER_CAP_MAX_SHADER_IMAGES: case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS: case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS: - case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT: return 0; } /* If we get here, we failed to handle a cap above */ @@ -743,7 +741,6 @@ vgpu10_get_shader_param(struct pipe_screen *screen, case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS: return sws->have_gl43 ? SVGA_MAX_ATOMIC_BUFFERS : 0; - case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT: case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE: case PIPE_SHADER_CAP_INT64_ATOMICS: return 0; diff --git a/src/gallium/drivers/v3d/v3d_screen.c b/src/gallium/drivers/v3d/v3d_screen.c index b0dca2afcb0..a079f2b2edc 100644 --- a/src/gallium/drivers/v3d/v3d_screen.c +++ b/src/gallium/drivers/v3d/v3d_screen.c @@ -466,9 +466,6 @@ v3d_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader, return PIPE_SHADER_IR_NIR; case PIPE_SHADER_CAP_SUPPORTED_IRS: return 1 << PIPE_SHADER_IR_NIR; - case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT: - /* We use NIR's loop unrolling */ - return 0; default: fprintf(stderr, "unknown shader param %d\n", param); return 0; diff --git a/src/gallium/drivers/vc4/vc4_screen.c b/src/gallium/drivers/vc4/vc4_screen.c index 5bd4e35d502..0f17f03922e 100644 --- a/src/gallium/drivers/vc4/vc4_screen.c +++ b/src/gallium/drivers/vc4/vc4_screen.c @@ -311,7 +311,6 @@ vc4_screen_get_shader_param(struct pipe_screen *pscreen, return PIPE_SHADER_IR_NIR; case PIPE_SHADER_CAP_SUPPORTED_IRS: return 1 << PIPE_SHADER_IR_NIR; - case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT: case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS: case PIPE_SHADER_CAP_MAX_SHADER_IMAGES: case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS: diff --git a/src/gallium/drivers/zink/zink_screen.c b/src/gallium/drivers/zink/zink_screen.c index 3645c7fb8ca..0805ad5d7df 100644 --- a/src/gallium/drivers/zink/zink_screen.c +++ b/src/gallium/drivers/zink/zink_screen.c @@ -1012,9 +1012,6 @@ zink_get_shader_param(struct pipe_screen *pscreen, case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE: return 0; /* no idea */ - case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT: - return 0; - case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS: switch (shader) { case PIPE_SHADER_VERTEX: diff --git a/src/gallium/include/pipe/p_defines.h b/src/gallium/include/pipe/p_defines.h index e6b4a711f32..b26cbf7cba6 100644 --- a/src/gallium/include/pipe/p_defines.h +++ b/src/gallium/include/pipe/p_defines.h @@ -1101,7 +1101,6 @@ enum pipe_shader_cap PIPE_SHADER_CAP_DROUND_SUPPORTED, /* all rounding modes */ PIPE_SHADER_CAP_DFRACEXP_DLDEXP_SUPPORTED, PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE, - PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT, PIPE_SHADER_CAP_MAX_SHADER_BUFFERS, PIPE_SHADER_CAP_SUPPORTED_IRS, PIPE_SHADER_CAP_MAX_SHADER_IMAGES, diff --git a/src/mesa/state_tracker/st_extensions.c b/src/mesa/state_tracker/st_extensions.c index e0ceb29a26d..c0e87b14363 100644 --- a/src/mesa/state_tracker/st_extensions.c +++ b/src/mesa/state_tracker/st_extensions.c @@ -351,10 +351,6 @@ void st_init_limits(struct pipe_screen *screen, can_ubo = false; } - options->MaxUnrollIterations = - screen->get_shader_param(screen, sh, - PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT); - if (!screen->get_param(screen, PIPE_CAP_NIR_COMPACT_ARRAYS)) options->LowerCombinedClipCullDistance = true;